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Commit 5fed67df authored by Brian Norris's avatar Brian Norris
Browse files

Merge tag 'spi-nor/for-4.10' of git://github.com/spi-nor/linux 

From Cyrille Pitchen:

"""
This pull request contains the following notable changes:
- add support to new memory parts.
- fix of spansion_quad_enable().
- fix of the Candence QSPI driver.
- constify some structure instances of the Freescale QSPI driver.
"""
parents 0989b090 dfce0cd9

drivers/mtd/spi-nor/cadence-quadspi.c

+4 −2
Original line number Diff line number Diff line
@@ -1077,12 +1077,14 @@ static int cqspi_setup_flash(struct cqspi_st *cqspi, struct device_node *np) 


	/* Get flash device data */

	for_each_available_child_of_node(dev->of_node, np) {

		if (of_property_read_u32(np, "reg", &cs)) {

		ret = of_property_read_u32(np, "reg", &cs);

		if (ret) {

			dev_err(dev, "Couldn't determine chip select.\n");

			goto err;

		}



		if (cs > CQSPI_MAX_CHIPSELECT) {

		if (cs >= CQSPI_MAX_CHIPSELECT) {

			ret = -EINVAL;

			dev_err(dev, "Chip select %d out of range.\n", cs);

			goto err;

		}

drivers/mtd/spi-nor/fsl-quadspi.c

+4 −4
Original line number Diff line number Diff line
@@ -224,7 +224,7 @@ struct fsl_qspi_devtype_data { 
	int driver_data;

};



static struct fsl_qspi_devtype_data vybrid_data = {

static const struct fsl_qspi_devtype_data vybrid_data = {

	.devtype = FSL_QUADSPI_VYBRID,

	.rxfifo = 128,

	.txfifo = 64,
@@ -232,7 +232,7 @@ static struct fsl_qspi_devtype_data vybrid_data = { 
	.driver_data = QUADSPI_QUIRK_SWAP_ENDIAN,

};



static struct fsl_qspi_devtype_data imx6sx_data = {

static const struct fsl_qspi_devtype_data imx6sx_data = {

	.devtype = FSL_QUADSPI_IMX6SX,

	.rxfifo = 128,

	.txfifo = 512,
@@ -241,7 +241,7 @@ static struct fsl_qspi_devtype_data imx6sx_data = { 
		       | QUADSPI_QUIRK_TKT245618,

};



static struct fsl_qspi_devtype_data imx7d_data = {

static const struct fsl_qspi_devtype_data imx7d_data = {

	.devtype = FSL_QUADSPI_IMX7D,

	.rxfifo = 512,

	.txfifo = 512,
@@ -250,7 +250,7 @@ static struct fsl_qspi_devtype_data imx7d_data = { 
		       | QUADSPI_QUIRK_4X_INT_CLK,

};



static struct fsl_qspi_devtype_data imx6ul_data = {

static const struct fsl_qspi_devtype_data imx6ul_data = {

	.devtype = FSL_QUADSPI_IMX6UL,

	.rxfifo = 128,

	.txfifo = 512,

drivers/mtd/spi-nor/spi-nor.c

+13 −1
Original line number Diff line number Diff line
@@ -799,6 +799,7 @@ static const struct flash_info spi_nor_ids[] = { 
	{ "at25fs040",  INFO(0x1f6604, 0, 64 * 1024,   8, SECT_4K) },



	{ "at25df041a", INFO(0x1f4401, 0, 64 * 1024,   8, SECT_4K) },

	{ "at25df321",  INFO(0x1f4700, 0, 64 * 1024,  64, SECT_4K) },

	{ "at25df321a", INFO(0x1f4701, 0, 64 * 1024,  64, SECT_4K) },

	{ "at25df641",  INFO(0x1f4800, 0, 64 * 1024, 128, SECT_4K) },
@@ -825,6 +826,7 @@ static const struct flash_info spi_nor_ids[] = { 
	/* Everspin */

	{ "mr25h256", CAT25_INFO( 32 * 1024, 1, 256, 2, SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) },

	{ "mr25h10",  CAT25_INFO(128 * 1024, 1, 256, 3, SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) },

	{ "mr25h40",  CAT25_INFO(512 * 1024, 1, 256, 3, SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) },



	/* Fujitsu */

	{ "mb85rs1mt", INFO(0x047f27, 0, 128 * 1024, 1, SPI_NOR_NO_ERASE) },
@@ -872,11 +874,13 @@ static const struct flash_info spi_nor_ids[] = { 
	{ "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, 0) },

	{ "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) },

	{ "mx25l25635e", INFO(0xc22019, 0, 64 * 1024, 512, 0) },

	{ "mx25u25635f", INFO(0xc22539, 0, 64 * 1024, 512, SECT_4K) },

	{ "mx25l25655e", INFO(0xc22619, 0, 64 * 1024, 512, 0) },

	{ "mx66l51235l", INFO(0xc2201a, 0, 64 * 1024, 1024, SPI_NOR_QUAD_READ) },

	{ "mx66l1g55g",  INFO(0xc2261b, 0, 64 * 1024, 2048, SPI_NOR_QUAD_READ) },



	/* Micron */

	{ "n25q016a",	 INFO(0x20bb15, 0, 64 * 1024,   32, SECT_4K | SPI_NOR_QUAD_READ) },

	{ "n25q032",	 INFO(0x20ba16, 0, 64 * 1024,   64, SPI_NOR_QUAD_READ) },

	{ "n25q032a",	 INFO(0x20bb16, 0, 64 * 1024,   64, SPI_NOR_QUAD_READ) },

	{ "n25q064",     INFO(0x20ba17, 0, 64 * 1024,  128, SECT_4K | SPI_NOR_QUAD_READ) },
@@ -905,7 +909,7 @@ static const struct flash_info spi_nor_ids[] = { 
	{ "s70fl01gs",  INFO(0x010221, 0x4d00, 256 * 1024, 256, 0) },

	{ "s25sl12800", INFO(0x012018, 0x0300, 256 * 1024,  64, 0) },

	{ "s25sl12801", INFO(0x012018, 0x0301,  64 * 1024, 256, 0) },

	{ "s25fl128s",	INFO6(0x012018, 0x4d0180, 64 * 1024, 256, SECT_4K | SPI_NOR_QUAD_READ) },

	{ "s25fl128s",	INFO6(0x012018, 0x4d0180, 64 * 1024, 256, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },

	{ "s25fl129p0", INFO(0x012018, 0x4d00, 256 * 1024,  64, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },

	{ "s25fl129p1", INFO(0x012018, 0x4d01,  64 * 1024, 256, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },

	{ "s25sl004a",  INFO(0x010212,      0,  64 * 1024,   8, 0) },
@@ -921,6 +925,7 @@ static const struct flash_info spi_nor_ids[] = { 
	{ "s25fl132k",  INFO(0x014016,      0,  64 * 1024,  64, SECT_4K) },

	{ "s25fl164k",  INFO(0x014017,      0,  64 * 1024, 128, SECT_4K) },

	{ "s25fl204k",  INFO(0x014013,      0,  64 * 1024,   8, SECT_4K | SPI_NOR_DUAL_READ) },

	{ "s25fl208k",  INFO(0x014014,      0,  64 * 1024,  16, SECT_4K | SPI_NOR_DUAL_READ) },



	/* SST -- large erase sizes are "overlays", "sectors" are 4K */

	{ "sst25vf040b", INFO(0xbf258d, 0, 64 * 1024,  8, SECT_4K | SST_WRITE) },
@@ -1255,6 +1260,13 @@ static int spansion_quad_enable(struct spi_nor *nor) 
		return -EINVAL;

	}



	ret = spi_nor_wait_till_ready(nor);

	if (ret) {

		dev_err(nor->dev,

			"timeout while writing configuration register\n");

		return ret;

	}



	/* read back and check it */

	ret = read_cr(nor);

	if (!(ret > 0 && (ret & CR_QUAD_EN_SPAN))) {