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Commit 5dd229e0 authored by Chetan C R's avatar Chetan C R
Browse files

clk: qcom: Add LPM Latency support for CPU clocks



This adds support of L2 pc for CPU clocks and also
dumps the reg values when rcg fails to update its
configuration.

Change-Id: Ie8d325a2aad19e548b00461551917523b0a0cbce
Signed-off-by: default avatarChetan C R <cchinnad@codeaurora.org>
parent 9057c23e
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+2 −1
Original line number Diff line number Diff line
@@ -51,7 +51,8 @@ int mux_div_set_src_div(struct clk_regmap_mux_div *md, u32 src, u32 div)
		udelay(1);
	}

	pr_err("%s: RCG did not update its configuration", name);
	WARN_CLK(md->clkr.hw.core, name, 1,
			"%s: rcg didn't update its configuration.", name);
	return -EBUSY;
}
EXPORT_SYMBOL_GPL(mux_div_set_src_div);
+22 −0
Original line number Diff line number Diff line
@@ -8,9 +8,28 @@
#define __QCOM_CLK_REGMAP_MUX_DIV_H__

#include <linux/clk-provider.h>
#include <linux/pm_qos.h>
#include <soc/qcom/pm.h>
#include "common.h"
#include "clk-regmap.h"

/**
 * struct clk_regmap_mux_div_lpm - regmap_mux_div_lpm clock
 * @cpu_reg_mask: logical cpu mask for node
 * @hw_low_power_ctrl: hw low power control
 * @req:  pm_qos request
 * @latency_lvl: lpm latency level
 * @cpu_latency_no_l2_pc_us:  cpu latency in ms
 */

struct clk_regmap_mux_div_lpm {
	cpumask_t cpu_reg_mask;
	bool hw_low_power_ctrl;
	struct pm_qos_request req;
	struct latency_level latency_lvl;
	s32 cpu_latency_no_l2_pc_us;
};

/**
 * struct mux_div_clk - combined mux/divider clock
 * @reg_offset: offset of the mux/divider register
@@ -52,6 +71,9 @@ struct clk_regmap_mux_div {
	struct clk_regmap		clkr;
	struct clk			*pclk;
	struct notifier_block		clk_nb;

	/* LPM Latency related */
	struct clk_regmap_mux_div_lpm	clk_lpm;
};

extern const struct clk_ops clk_regmap_mux_div_ops;