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Commit 5ba700c7 authored by Oscar Mateo's avatar Oscar Mateo Committed by Mika Kuoppala
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drm/i915/icl: Wa_1406838659 



Disable CGPSF unit clock gating to prevent an issue.

v2: Rebased on top of the WA refactoring
v3: Added References (Mika)
v4:
  - Rebased
  - C, not lisp (Chris)
  - Remove unintentional whitespaces (Mika)
  - Fixed in C0 (Mika)

References: HSDES#1406838659
Signed-off-by: default avatarOscar Mateo <oscar.mateo@intel.com>
Reviewed-by: default avatarMika Kuoppala <mika.kuoppala@linux.intel.com>
Signed-off-by: default avatarMika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1525814984-20039-13-git-send-email-oscar.mateo@intel.com
parent 5215eef3

drivers/gpu/drm/i915/i915_reg.h

+3 −0
Original line number Diff line number Diff line
@@ -3848,6 +3848,9 @@ enum { 
#define UNSLICE_UNIT_LEVEL_CLKGATE	_MMIO(0x9434)

#define  VFUNIT_CLKGATE_DIS		(1 << 20)



#define INF_UNIT_LEVEL_CLKGATE		_MMIO(0x9560)

#define   CGPSF_CLKGATE_DIS		(1 << 3)



/*

 * Display engine regs

 */

drivers/gpu/drm/i915/intel_workarounds.c

+6 −0
Original line number Diff line number Diff line
@@ -755,6 +755,12 @@ static void icl_gt_workarounds_apply(struct drm_i915_private *dev_priv) 
	I915_WRITE(GEN10_L3_CHICKEN_MODE_REGISTER,

		   I915_READ(GEN10_L3_CHICKEN_MODE_REGISTER) |

		   GEN11_I2M_WRITE_DISABLE);



	/* Wa_1406838659:icl (pre-prod) */

	if (IS_ICL_REVID(dev_priv, ICL_REVID_A0, ICL_REVID_B0))

		I915_WRITE(INF_UNIT_LEVEL_CLKGATE,

			   I915_READ(INF_UNIT_LEVEL_CLKGATE) |

			   CGPSF_CLKGATE_DIS);

}



void intel_gt_workarounds_apply(struct drm_i915_private *dev_priv)