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Commit 56b857a5 authored by Tvrtko Ursulin's avatar Tvrtko Ursulin
Browse files

drm/i915: More assorted dev_priv cleanups 



A small selection of macros which can only accept dev_priv from
now on and a resulting trickle of fixups.

v2: Keep original order. (Ville Syrjala)

Signed-off-by: default avatarTvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: default avatarDavid Weinehall <david.weinehall@linux.intel.com>
parent 0031fb96

drivers/gpu/drm/i915/i915_drv.h

+12 −12
Original line number Diff line number Diff line
@@ -2577,24 +2577,24 @@ struct drm_i915_cmd_table { 
#define HAS_128_BYTE_Y_TILING(dev_priv) (!IS_GEN2(dev_priv) && \

					 !(IS_I915G(dev_priv) || \

					 IS_I915GM(dev_priv)))

#define SUPPORTS_TV(dev)		(INTEL_INFO(dev)->supports_tv)

#define I915_HAS_HOTPLUG(dev)		 (INTEL_INFO(dev)->has_hotplug)

#define SUPPORTS_TV(dev_priv)		((dev_priv)->info.supports_tv)

#define I915_HAS_HOTPLUG(dev_priv)	((dev_priv)->info.has_hotplug)



#define HAS_FW_BLC(dev_priv) 	(INTEL_GEN(dev_priv) > 2)

#define HAS_PIPE_CXSR(dev) (INTEL_INFO(dev)->has_pipe_cxsr)

#define HAS_FBC(dev) (INTEL_INFO(dev)->has_fbc)

#define HAS_PIPE_CXSR(dev_priv) ((dev_priv)->info.has_pipe_cxsr)

#define HAS_FBC(dev_priv)	((dev_priv)->info.has_fbc)



#define HAS_IPS(dev_priv)	(IS_HSW_ULT(dev_priv) || IS_BROADWELL(dev_priv))



#define HAS_DP_MST(dev)	(INTEL_INFO(dev)->has_dp_mst)

#define HAS_DP_MST(dev_priv)	((dev_priv)->info.has_dp_mst)



#define HAS_DDI(dev_priv)		 ((dev_priv)->info.has_ddi)

#define HAS_FPGA_DBG_UNCLAIMED(dev)	(INTEL_INFO(dev)->has_fpga_dbg)

#define HAS_PSR(dev)		(INTEL_INFO(dev)->has_psr)

#define HAS_RC6(dev)		(INTEL_INFO(dev)->has_rc6)

#define HAS_RC6p(dev)		(INTEL_INFO(dev)->has_rc6p)

#define HAS_FPGA_DBG_UNCLAIMED(dev_priv) ((dev_priv)->info.has_fpga_dbg)

#define HAS_PSR(dev_priv)		 ((dev_priv)->info.has_psr)

#define HAS_RC6(dev_priv)		 ((dev_priv)->info.has_rc6)

#define HAS_RC6p(dev_priv)		 ((dev_priv)->info.has_rc6p)



#define HAS_CSR(dev)	(INTEL_INFO(dev)->has_csr)

#define HAS_CSR(dev_priv)	((dev_priv)->info.has_csr)



#define HAS_RUNTIME_PM(dev_priv) ((dev_priv)->info.has_runtime_pm)

#define HAS_64BIT_RELOC(dev_priv) ((dev_priv)->info.has_64bit_reloc)

drivers/gpu/drm/i915/i915_gpu_error.c

+1 −1
Original line number Diff line number Diff line
@@ -573,7 +573,7 @@ int i915_error_state_to_str(struct drm_i915_error_state_buf *m, 
		   pdev->subsystem_device);

	err_printf(m, "IOMMU enabled?: %d\n", error->iommu);



	if (HAS_CSR(dev)) {

	if (HAS_CSR(dev_priv)) {

		struct intel_csr *csr = &dev_priv->csr;



		err_printf(m, "DMC loaded: %s\n",

drivers/gpu/drm/i915/i915_irq.c

+3 −3
Original line number Diff line number Diff line
@@ -3678,7 +3678,7 @@ static void i915_irq_preinstall(struct drm_device * dev) 
	struct drm_i915_private *dev_priv = to_i915(dev);

	int pipe;



	if (I915_HAS_HOTPLUG(dev)) {

	if (I915_HAS_HOTPLUG(dev_priv)) {

		i915_hotplug_interrupt_update(dev_priv, 0xffffffff, 0);

		I915_WRITE(PORT_HOTPLUG_STAT, I915_READ(PORT_HOTPLUG_STAT));

	}
@@ -3712,7 +3712,7 @@ static int i915_irq_postinstall(struct drm_device *dev) 
		I915_DISPLAY_PIPE_B_EVENT_INTERRUPT |

		I915_USER_INTERRUPT;



	if (I915_HAS_HOTPLUG(dev)) {

	if (I915_HAS_HOTPLUG(dev_priv)) {

		i915_hotplug_interrupt_update(dev_priv, 0xffffffff, 0);

		POSTING_READ(PORT_HOTPLUG_EN);
@@ -3880,7 +3880,7 @@ static void i915_irq_uninstall(struct drm_device * dev) 
	struct drm_i915_private *dev_priv = to_i915(dev);

	int pipe;



	if (I915_HAS_HOTPLUG(dev)) {

	if (I915_HAS_HOTPLUG(dev_priv)) {

		i915_hotplug_interrupt_update(dev_priv, 0xffffffff, 0);

		I915_WRITE(PORT_HOTPLUG_STAT, I915_READ(PORT_HOTPLUG_STAT));

	}

drivers/gpu/drm/i915/intel_crt.c

+4 −4
Original line number Diff line number Diff line
@@ -693,7 +693,7 @@ intel_crt_detect(struct drm_connector *connector, bool force) 
	power_domain = intel_display_port_power_domain(intel_encoder);

	intel_display_power_get(dev_priv, power_domain);



	if (I915_HAS_HOTPLUG(dev)) {

	if (I915_HAS_HOTPLUG(dev_priv)) {

		/* We can not rely on the HPD pin always being correctly wired

		 * up, for example many KVM do not pass it through, and so

		 * only trust an assertion that the monitor is connected.
@@ -715,7 +715,7 @@ intel_crt_detect(struct drm_connector *connector, bool force) 
	 * broken monitor (without edid) to work behind a broken kvm (that fails

	 * to have the right resistors for HP detection) needs to fix this up.

	 * For now just bail out. */

	if (I915_HAS_HOTPLUG(dev) && !i915.load_detect_test) {

	if (I915_HAS_HOTPLUG(dev_priv) && !i915.load_detect_test) {

		status = connector_status_disconnected;

		goto out;

	}
@@ -915,7 +915,7 @@ void intel_crt_init(struct drm_device *dev) 
		crt->base.disable = intel_disable_crt;

	}

	crt->base.enable = intel_enable_crt;

	if (I915_HAS_HOTPLUG(dev) &&

	if (I915_HAS_HOTPLUG(dev_priv) &&

	    !dmi_check_system(intel_spurious_crt_detect))

		crt->base.hpd_pin = HPD_CRT;

	if (HAS_DDI(dev_priv)) {
@@ -932,7 +932,7 @@ void intel_crt_init(struct drm_device *dev) 


	drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);



	if (!I915_HAS_HOTPLUG(dev))

	if (!I915_HAS_HOTPLUG(dev_priv))

		intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT;



	/*

drivers/gpu/drm/i915/intel_display.c

+2 −2
Original line number Diff line number Diff line
@@ -8440,7 +8440,7 @@ static void i9xx_set_pipeconf(struct intel_crtc *intel_crtc) 
		}

	}



	if (HAS_PIPE_CXSR(dev)) {

	if (HAS_PIPE_CXSR(dev_priv)) {

		if (intel_crtc->lowfreq_avail) {

			DRM_DEBUG_KMS("enabling CxSR downclocking\n");

			pipeconf |= PIPECONF_CXSR_DOWNCLOCK;
@@ -15652,7 +15652,7 @@ static void intel_setup_outputs(struct drm_device *dev) 
	} else if (IS_GEN2(dev_priv))

		intel_dvo_init(dev);



	if (SUPPORTS_TV(dev))

	if (SUPPORTS_TV(dev_priv))

		intel_tv_init(dev);



	intel_psr_init(dev);