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Commit 4bb4acea authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'xilinx-dt-for-4.17' of https://github.com/Xilinx/linux-xlnx into next/dt

Pull "arm: Xilinx(Zynq and ZynqMP) DT changes for v4.17" from Michal Simek:

- Use SPDX license identifier
- Add Xilinx ZynqMP boards
  zcu100-revC, zcu102-revA/revB/rev1.0, zcu104-revA, zcu106-revA,
  zcu111-revA, zc1751 dc1/dc2/dc3/dc4
- Add Xilinx Zynq boards
  cc108, zc770 dc1/dc2/dc3/dc4
- Add Digilent Zybo Z7
- Minor fixes in current DTSes

* tag 'xilinx-dt-for-4.17' of https://github.com/Xilinx/linux-xlnx: (22 commits)
  arm: dts: zynq: Add Digilent Zybo Z7 board
  arm: zynq: Add support for Xilinx zc770 xm013 dc4 board
  arm: zynq: Add support for Xilinx zc770 xm012 dc3 board
  arm: zynq: Add support for Xilinx zc770 xm011 dc2 board
  arm: zynq: Add support for Xilinx zc770 xm010 dc1 board
  arm: zynq: Add Xilinx cc108 board
  arm: zynq: Add missing address node name in microzed board
  arm: dts: zynq: Use SPDX-License-Identifier
  arm: zynq: Use i2c-mux instead of i2cswitch for pca9548
  arm64: zynqmp: Add support for Xilinx zc1751
  arm64: zynqmp: Add support for Xilinx zc12XX boards
  arm64: zynqmp: Add support for Xilinx zcu111-revA
  arm64: zynqmp: Add support for Xilinx zcu106-revA
  arm64: zynqmp: Add support for Xilinx zcu104-revA
  arm64: zynqmp: Add support for Xilinx zcu102
  arm64: zynqmp: Add support for Xilinx zcu100-revC
  dt-bindings: xilinx: Add description for ZynqMP
  arm64: zynqmp: Add 8-bit bus width property for ep108
  arm64: zynqmp: Added OOB timing settings in zynqmp-ep108.dts
  arm64: zynqmp: Add SPDX license identifier
  ...
parents 36719eb1 ba5c7a03
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@@ -5,3 +5,59 @@ shall have the following properties.

Required root node properties:
    - compatible = "xlnx,zynq-7000";

Additional compatible strings:

- Xilinx internal board cc108
  "xlnx,zynq-cc108"

- Xilinx internal board zc770 with different FMC cards
  "xlnx,zynq-zc770-xm010"
  "xlnx,zynq-zc770-xm011"
  "xlnx,zynq-zc770-xm012"
  "xlnx,zynq-zc770-xm013"

- Digilent Zybo Z7 board
  "digilent,zynq-zybo-z7"

---------------------------------------------------------------

Xilinx Zynq UltraScale+ MPSoC Platforms Device Tree Bindings

Boards with ZynqMP SOC based on an ARM Cortex A53 processor
shall have the following properties.

Required root node properties:
    - compatible = "xlnx,zynqmp";


Additional compatible strings:

- Xilinx internal board zc1232
  "xlnx,zynqmp-zc1232-revA", "xlnx,zynqmp-zc1232"

- Xilinx internal board zc1254
  "xlnx,zynqmp-zc1254-revA", "xlnx,zynqmp-zc1254"

- Xilinx internal board zc1275
  "xlnx,zynqmp-zc1275-revA", "xlnx,zynqmp-zc1275"

- Xilinx internal board zc1751
  "xlnx,zynqmp-zc1751"

- Xilinx 96boards compatible board zcu100
  "xlnx,zynqmp-zcu100-revC", "xlnx,zynqmp-zcu100"

- Xilinx evaluation board zcu102
  "xlnx,zynqmp-zcu102-revA", "xlnx,zynqmp-zcu102"
  "xlnx,zynqmp-zcu102-revB", "xlnx,zynqmp-zcu102"
  "xlnx,zynqmp-zcu102-rev1.0", "xlnx,zynqmp-zcu102"

- Xilinx evaluation board zcu104
  "xlnx,zynqmp-zcu104-revA", "xlnx,zynqmp-zcu104"

- Xilinx evaluation board zcu106
  "xlnx,zynqmp-zcu106-revA", "xlnx,zynqmp-zcu106"

- Xilinx evaluation board zcu111
  "xlnx,zynqmp-zcu111-revA", "xlnx,zynqmp-zcu111"
+7 −1
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@@ -1070,12 +1070,18 @@ dtb-$(CONFIG_ARCH_VT8500) += \
	wm8750-apc8750.dtb \
	wm8850-w70v2.dtb
dtb-$(CONFIG_ARCH_ZYNQ) += \
	zynq-cc108.dtb \
	zynq-microzed.dtb \
	zynq-parallella.dtb \
	zynq-zc702.dtb \
	zynq-zc706.dtb \
	zynq-zc770-xm010.dtb \
	zynq-zc770-xm011.dtb \
	zynq-zc770-xm012.dtb \
	zynq-zc770-xm013.dtb \
	zynq-zed.dtb \
	zynq-zybo.dtb
	zynq-zybo.dtb \
	zynq-zybo-z7.dtb
dtb-$(CONFIG_MACH_ARMADA_370) += \
	armada-370-db.dtb \
	armada-370-dlink-dns327l.dtb \
+2 −10
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// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (C) 2011 - 2014 Xilinx
 *
 * This software is licensed under the terms of the GNU General Public
 * License version 2, as published by the Free Software Foundation, and
 * may be copied, distributed, and modified under those terms.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

/ {
+75 −0
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// SPDX-License-Identifier: GPL-2.0+
/*
 * Xilinx CC108 board DTS
 *
 * (C) Copyright 2007-2018 Xilinx, Inc.
 * (C) Copyright 2007-2013 Michal Simek
 * (C) Copyright 2007-2012 PetaLogix Qld Pty Ltd
 *
 * Michal SIMEK <monstr@monstr.eu>
 */
/dts-v1/;
/include/ "zynq-7000.dtsi"

/ {
	compatible = "xlnx,zynq-cc108", "xlnx,zynq-7000";
	model = "Xilinx Zynq";

	aliases {
		ethernet0 = &gem0;
		serial0 = &uart0;
	};

	chosen {
		bootargs = "";
		stdout-path = "serial0:115200n8";
	};

	memory@0 {
		device_type = "memory";
		reg = <0x0 0x20000000>;
	};

	usb_phy0: phy0 {
		compatible = "usb-nop-xceiv";
		#phy-cells = <0>;
	};

	usb_phy1: phy1 {
		compatible = "usb-nop-xceiv";
		#phy-cells = <0>;
	};
};

&gem0 {
	status = "okay";
	phy-mode = "rgmii-id";
	phy-handle = <&ethernet_phy>;

	ethernet_phy: ethernet-phy@1 {
		reg = <1>;
		device_type = "ethernet-phy";
	};
};

&sdhci1 {
	status = "okay";
	broken-cd ;
	wp-inverted ;
};

&uart0 {
	status = "okay";
};

&usb0 {
	status = "okay";
	dr_mode = "host";
	usb-phy = <&usb_phy0>;
};

&usb1 {
	status = "okay";
	dr_mode = "host";
	usb-phy = <&usb_phy1>;
};
+2 −10
Original line number Diff line number Diff line
// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (C) 2011 - 2014 Xilinx
 * Copyright (C) 2016 Jagan Teki <jteki@openedev.com>
 *
 * This software is licensed under the terms of the GNU General Public
 * License version 2, as published by the Free Software Foundation, and
 * may be copied, distributed, and modified under those terms.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */
/dts-v1/;
/include/ "zynq-7000.dtsi"
@@ -23,7 +15,7 @@
		serial0 = &uart1;
	};

	memory {
	memory@0 {
		device_type = "memory";
		reg = <0x0 0x40000000>;
	};
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