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Commit 36719eb1 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'samsung-dt64-4.17' of...

Merge tag 'samsung-dt64-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt

Pull "Samsung DTS ARM64 changes for v4.17" from Krzysztof Kozłowski:

1. Add support for HDMI audio on Exynos 5433 TM2/TM2E boards.
2. Add support for USB-MHL connector on Exynos 5433 TM2/TM2E boards.

* tag 'samsung-dt64-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  arm64: dts: exynos: add OF graph between MHL and USB connector
  arm64: dts: exynos: add micro-USB connector node to TM2 platforms
  ARM: dts: exynos: Add support for HDMI audio on Exynos 5433 TM2 board
  ARM: dts: exynos: Update I2S0 device node in exynos5433
  ARM: dts: exynos: Add I2S1 device node to exynos5433
parents e238310c 6ca62037
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+83 −7
Original line number Diff line number Diff line
@@ -14,6 +14,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/sound/samsung-i2s.h>

/ {
	aliases {
@@ -112,8 +113,8 @@

	sound {
		compatible = "samsung,tm2-audio";
		audio-codec = <&wm5110>;
		i2s-controller = <&i2s0>;
		audio-codec = <&wm5110>, <&hdmi>;
		i2s-controller = <&i2s0 0>, <&i2s1 0>;
		audio-amplifier = <&max98504>;
		mic-bias-gpios = <&gpr3 2 GPIO_ACTIVE_HIGH>;
		model = "wm5110";
@@ -217,8 +218,40 @@
};

&cmu_aud {
	assigned-clocks = <&cmu_aud CLK_MOUT_AUD_PLL_USER>;
	assigned-clock-parents = <&cmu_top CLK_FOUT_AUD_PLL>;
	assigned-clocks = <&cmu_aud CLK_MOUT_AUD_PLL_USER>,
		<&cmu_aud CLK_MOUT_SCLK_AUD_I2S>,
		<&cmu_aud CLK_MOUT_SCLK_AUD_PCM>,
		<&cmu_top CLK_MOUT_AUD_PLL>,
		<&cmu_top CLK_MOUT_AUD_PLL_USER_T>,
		<&cmu_top CLK_MOUT_SCLK_AUDIO0>,
		<&cmu_top CLK_MOUT_SCLK_AUDIO1>,
		<&cmu_top CLK_MOUT_SCLK_SPDIF>,

		<&cmu_aud CLK_DIV_AUD_CA5>,
		<&cmu_aud CLK_DIV_ACLK_AUD>,
		<&cmu_aud CLK_DIV_PCLK_DBG_AUD>,
		<&cmu_aud CLK_DIV_SCLK_AUD_I2S>,
		<&cmu_aud CLK_DIV_SCLK_AUD_PCM>,
		<&cmu_aud CLK_DIV_SCLK_AUD_SLIMBUS>,
		<&cmu_aud CLK_DIV_SCLK_AUD_UART>,
		<&cmu_top CLK_DIV_SCLK_AUDIO0>,
		<&cmu_top CLK_DIV_SCLK_AUDIO1>,
		<&cmu_top CLK_DIV_SCLK_PCM1>,
		<&cmu_top CLK_DIV_SCLK_I2S1>;

	assigned-clock-parents = <&cmu_top CLK_FOUT_AUD_PLL>,
		<&cmu_aud CLK_MOUT_AUD_PLL_USER>,
		<&cmu_aud CLK_MOUT_AUD_PLL_USER>,
		<&cmu_top CLK_FOUT_AUD_PLL>,
		<&cmu_top CLK_MOUT_AUD_PLL>,
		<&cmu_top CLK_MOUT_AUD_PLL_USER_T>,
		<&cmu_top CLK_MOUT_AUD_PLL_USER_T>,
		<&cmu_top CLK_SCLK_AUDIO0>;

	assigned-clock-rates = <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>,
		<196608001>, <65536001>, <32768001>, <49152001>,
		<2048001>, <24576001>, <196608001>,
		<24576001>, <98304001>, <2048001>, <49152001>;
};

&cmu_fsys {
@@ -267,6 +300,11 @@
				 <&cmu_top CLK_MOUT_BUS_PLL_USER>;
};

&cmu_top {
	assigned-clocks = <&cmu_top CLK_FOUT_AUD_PLL>;
	assigned-clock-rates = <196608001>;
};

&cpu0 {
	cpu-supply = <&buck3_reg>;
};
@@ -779,11 +817,24 @@
		clocks = <&pmu_system_controller 0>;
		clock-names = "xtal";

		port {
		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;
				mhl_to_hdmi: endpoint {
					remote-endpoint = <&hdmi_to_mhl>;
				};
			};

			port@1 {
				reg = <1>;
				mhl_to_musb_con: endpoint {
					remote-endpoint = <&musb_con_to_mhl>;
				};
			};
		};
	};
};

@@ -798,6 +849,25 @@

		muic: max77843-muic {
			compatible = "maxim,max77843-muic";

			musb_con: musb_connector {
				compatible = "samsung,usb-connector-11pin",
					     "usb-b-connector";
				label = "micro-USB";
				type = "micro";

				ports {
					#address-cells = <1>;
					#size-cells = <0>;

					port@3 {
						reg = <3>;
						musb_con_to_mhl: endpoint {
							remote-endpoint = <&mhl_to_musb_con>;
						};
					};
				};
			};
		};

		regulators {
@@ -838,6 +908,12 @@
	status = "okay";
};

&i2s1 {
	assigned-clocks = <&i2s1 CLK_I2S_RCLK_SRC>;
	assigned-clock-parents = <&cmu_peric CLK_SCLK_I2S1>;
	status = "okay";
};

&mshc_0 {
	status = "okay";
	mmc-hs200-1_8v;
+23 −1
Original line number Diff line number Diff line
@@ -969,6 +969,7 @@
			ddc = <&hsi2c_11>;
			samsung,syscon-phandle = <&pmu_system_controller>;
			samsung,sysreg-phandle = <&syscon_disp>;
			#sound-dai-cells = <0>;
			status = "disabled";
		};

@@ -1311,6 +1312,25 @@
			status = "disabled";
		};

		i2s1: i2s@14d60000 {
			compatible = "samsung,exynos7-i2s";
			reg = <0x14d60000 0x100>;
			dmas = <&pdma0 31 &pdma0 30>;
			dma-names = "tx", "rx";
			interrupts = <GIC_SPI 435 IRQ_TYPE_NONE>;
			clocks = <&cmu_peric CLK_PCLK_I2S1>,
				 <&cmu_peric CLK_PCLK_I2S1>,
				 <&cmu_peric CLK_SCLK_I2S1>;
			clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
			#clock-cells = <1>;
			samsung,supports-6ch;
			samsung,supports-rstclr;
			samsung,supports-tdm;
			samsung,supports-low-rfs;
			#sound-dai-cells = <1>;
			status = "disabled";
		};

		pwm: pwm@14dd0000 {
			compatible = "samsung,exynos4210-pwm";
			reg = <0x14dd0000 0x100>;
@@ -1639,7 +1659,7 @@
				power-domains = <&pd_aud>;
			};

			i2s0: i2s0@11440000 {
			i2s0: i2s@11440000 {
				compatible = "samsung,exynos7-i2s";
				reg = <0x11440000 0x100>;
				dmas = <&adma 0 &adma 2>;
@@ -1651,9 +1671,11 @@
					<&cmu_aud CLK_SCLK_AUD_I2S>,
					<&cmu_aud CLK_SCLK_I2S_BCLK>;
				clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
				#clock-cells = <1>;
				pinctrl-names = "default";
				pinctrl-0 = <&i2s0_bus>;
				power-domains = <&pd_aud>;
				#sound-dai-cells = <1>;
				status = "disabled";
			};