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Commit 3c0c01ab authored by Russell King's avatar Russell King
Browse files

Merge branch 'devel-stable' into for-next 

Conflicts:
	arch/arm/Makefile
	arch/arm/include/asm/glue-proc.h
parents cbd379b1 809e660f

arch/arm/Kconfig

+12 −4
Original line number Diff line number Diff line
@@ -9,7 +9,7 @@ config ARM 
	select BUILDTIME_EXTABLE_SORT if MMU

	select CPU_PM if (SUSPEND || CPU_IDLE)

	select DCACHE_WORD_ACCESS if (CPU_V6 || CPU_V6K || CPU_V7) && !CPU_BIG_ENDIAN && MMU

	select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI)

	select GENERIC_ATOMIC64 if (CPU_V7M || CPU_V6 || !CPU_32v6K || !AEABI)

	select GENERIC_CLOCKEVENTS_BROADCAST if SMP

	select GENERIC_IRQ_PROBE

	select GENERIC_IRQ_SHOW
@@ -1441,7 +1441,7 @@ config SMP 
	depends on CPU_V6K || CPU_V7

	depends on GENERIC_CLOCKEVENTS

	depends on HAVE_SMP

	depends on MMU

	depends on MMU || ARM_MPU

	select USE_GENERIC_SMP_HELPERS

	help

	  This enables support for systems with more than one CPU. If you have
@@ -1462,7 +1462,7 @@ config SMP 


config SMP_ON_UP

	bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"

	depends on SMP && !XIP_KERNEL

	depends on SMP && !XIP_KERNEL && MMU

	default y

	help

	  SMP kernels contain instructions which fail on non-SMP processors.
@@ -1612,7 +1612,7 @@ config SCHED_HRTICK 


config THUMB2_KERNEL

	bool "Compile the kernel in Thumb-2 mode" if !CPU_THUMBONLY

	depends on CPU_V7 && !CPU_V6 && !CPU_V6K

	depends on (CPU_V7 || CPU_V7M) && !CPU_V6 && !CPU_V6K

	default y if CPU_THUMBONLY

	select AEABI

	select ARM_ASM_UNIFIED
@@ -1734,6 +1734,14 @@ config HW_PERF_EVENTS 
	  Enable hardware performance counter support for perf events. If

	  disabled, perf events will use software events only.



config SYS_SUPPORTS_HUGETLBFS

       def_bool y

       depends on ARM_LPAE



config HAVE_ARCH_TRANSPARENT_HUGEPAGE

       def_bool y

       depends on ARM_LPAE



source "mm/Kconfig"



config FORCE_MAX_ZONEORDER

arch/arm/Kconfig-nommu

+13 −1
Original line number Diff line number Diff line
@@ -28,7 +28,7 @@ config FLASH_SIZE 
config PROCESSOR_ID

	hex 'Hard wire the processor ID'

	default 0x00007700

	depends on !CPU_CP15

	depends on !(CPU_CP15 || CPU_V7M)

	help

	  If processor has no CP15 register, this processor ID is

	  used instead of the auto-probing which utilizes the register.
@@ -50,3 +50,15 @@ config REMAP_VECTORS_TO_RAM 
	  Otherwise, say 'y' here.  In this case, the kernel will require

	  external support to redirect the hardware exception vectors to

	  the writable versions located at DRAM_BASE.



config ARM_MPU

       bool 'Use the ARM v7 PMSA Compliant MPU'

       depends on CPU_V7

       default y

       help

         Some ARM systems without an MMU have instead a Memory Protection

         Unit (MPU) that defines the type and permissions for regions of

         memory.



         If your CPU has an MPU then you should choose 'y' here unless you

         know that you do not want to use the MPU.

arch/arm/Kconfig.debug

+9 −1
Original line number Diff line number Diff line
@@ -476,6 +476,13 @@ choice 
		  of the tiles using the RS1 memory map, including all new A-class

		  core tiles, FPGA-based SMMs and software models.



	config DEBUG_VEXPRESS_UART0_CRX

		bool "Use PL011 UART0 at 0xb0090000 (Cortex-R compliant tiles)"

		depends on ARCH_VEXPRESS && !MMU

		help

		  This option selects UART0 at 0xb0090000. This is appropriate for

		  Cortex-R series tiles and SMMs, such as Cortex-R5 and Cortex-R7



	config DEBUG_VT8500_UART0

		bool "Use UART0 on VIA/Wondermedia SoCs"

		depends on ARCH_VT8500
@@ -645,7 +652,8 @@ config DEBUG_LL_INCLUDE 
	default "debug/tegra.S" if DEBUG_TEGRA_UART

	default "debug/ux500.S" if DEBUG_UX500_UART

	default "debug/vexpress.S" if DEBUG_VEXPRESS_UART0_DETECT || \

		DEBUG_VEXPRESS_UART0_CA9 || DEBUG_VEXPRESS_UART0_RS1

		DEBUG_VEXPRESS_UART0_CA9 || DEBUG_VEXPRESS_UART0_RS1 || \

		DEBUG_VEXPRESS_UART0_CRX

	default "debug/vt8500.S" if DEBUG_VT8500_UART0

	default "debug/zynq.S" if DEBUG_ZYNQ_UART0 || DEBUG_ZYNQ_UART1

	default "mach/debug-macro.S"

arch/arm/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -59,6 +59,7 @@ comma = , 
# Note that GCC does not numerically define an architecture version

# macro, but instead defines a whole series of macros which makes

# testing for a specific architecture or later rather impossible.

arch-$(CONFIG_CPU_32v7M)	=-D__LINUX_ARM_ARCH__=7 -march=armv7-m -Wa,-march=armv7-m

arch-$(CONFIG_CPU_32v7)		=-D__LINUX_ARM_ARCH__=7 $(call cc-option,-march=armv7-a,-march=armv5t -Wa$(comma)-march=armv7-a)

arch-$(CONFIG_CPU_32v6)		=-D__LINUX_ARM_ARCH__=6 $(call cc-option,-march=armv6,-march=armv5t -Wa$(comma)-march=armv6)

# Only override the compiler option if ARMv6. The ARMv6K extensions are

arch/arm/include/asm/arch_timer.h

+0 −9
Original line number Diff line number Diff line
@@ -80,15 +80,6 @@ static inline u32 arch_timer_get_cntfrq(void) 
	return val;

}



static inline u64 arch_counter_get_cntpct(void)

{

	u64 cval;



	isb();

	asm volatile("mrrc p15, 0, %Q0, %R0, c14" : "=r" (cval));

	return cval;

}



static inline u64 arch_counter_get_cntvct(void)

{

	u64 cval;