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Commit 2de3aac9 authored by Tom St Denis's avatar Tom St Denis Committed by Alex Deucher
Browse files

drm/amd/amdgpu: Tidy up of gfx_v6_0_setup_rb() 



Signed-off-by: default avatarTom St Denis <tom.stdenis@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 5a7bfded

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

+5 −5
Original line number Diff line number Diff line
@@ -1271,7 +1271,8 @@ static void gfx_v6_0_setup_rb(struct amdgpu_device *adev) 
		for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) {

			gfx_v6_0_select_se_sh(adev, i, j, 0xffffffff);

			data = gfx_v6_0_get_rb_active_bitmap(adev);

			active_rbs |= data << ((i * adev->gfx.config.max_sh_per_se + j) *

			active_rbs |= data <<

				((i * adev->gfx.config.max_sh_per_se + j) *

				 rb_bitmap_width_per_sh);

		}

	}
@@ -1286,13 +1287,12 @@ static void gfx_v6_0_setup_rb(struct amdgpu_device *adev) 
	gfx_v6_0_raster_config(adev, &raster_config);



	if (!adev->gfx.config.backend_enable_mask ||

			adev->gfx.config.num_rbs >= num_rb_pipes) {

	     adev->gfx.config.num_rbs >= num_rb_pipes)

		WREG32(mmPA_SC_RASTER_CONFIG, raster_config);

	} else {

	else

		gfx_v6_0_write_harvested_raster_configs(adev, raster_config,

							adev->gfx.config.backend_enable_mask,

							num_rb_pipes);

	}



	/* cache the values for userspace */

	for (i = 0; i < adev->gfx.config.max_shader_engines; i++) {