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Commit 2b3f2f37 authored by Rocky Hao's avatar Rocky Hao Committed by Heiko Stuebner
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ARM: dts: rockchip: set a sane frequence for tsadc on rk322x 



Update freq of tsadc's working clock as 32768 hz, if not set, tsadc
will work at a default frequence.

Signed-off-by: default avatarRocky Hao <rocky.hao@rock-chips.com>
Signed-off-by: default avatarFrank Wang <frank.wang@rock-chips.com>
Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent 9f12da43

arch/arm/boot/dts/rk322x.dtsi

+2 −0
Original line number Diff line number Diff line
@@ -434,6 +434,8 @@ 
		interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;

		clock-names = "tsadc", "apb_pclk";

		assigned-clocks = <&cru SCLK_TSADC>;

		assigned-clock-rates = <32768>;

		resets = <&cru SRST_TSADC>;

		reset-names = "tsadc-apb";

		pinctrl-names = "init", "default", "sleep";