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Commit 278ac33b authored by Mark Brown's avatar Mark Brown
Browse files

Merge remote-tracking branch 'spi/topic/quad' into spi-next

parents 85cac431 a110f93d
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+10 −0
Original line number Diff line number Diff line
@@ -55,6 +55,16 @@ contain the following properties.
    		chip select active high
- spi-3wire       - (optional) Empty property indicating device requires
    		    3-wire mode.
- spi-tx-bus-width - (optional) The bus width(number of data wires) that
                      used for MOSI. Defaults to 1 if not present.
- spi-rx-bus-width - (optional) The bus width(number of data wires) that
                      used for MISO. Defaults to 1 if not present.

Some SPI controllers and devices support Dual and Quad SPI transfer mode.
It allows data in SPI system transfered in 2 wires(DUAL) or 4 wires(QUAD).
Now the value that spi-tx-bus-width and spi-rx-bus-width can receive is
only 1(SINGLE), 2(DUAL) and 4(QUAD).
Dual/Quad mode is not allowed when 3-wire mode is used.

If a gpio chipselect is used for the SPI slave the gpio number will be passed
via the cs_gpio
+37 −40
Original line number Diff line number Diff line
@@ -886,13 +886,8 @@ static void of_register_spi_devices(struct spi_master *master)
			spi->mode |= SPI_3WIRE;

		/* Device DUAL/QUAD mode */
		prop = of_get_property(nc, "spi-tx-nbits", &len);
		if (!prop || len < sizeof(*prop)) {
			dev_err(&master->dev, "%s has no 'spi-tx-nbits' property\n",
				nc->full_name);
			spi_dev_put(spi);
			continue;
		}
		prop = of_get_property(nc, "spi-tx-bus-width", &len);
		if (prop && len == sizeof(*prop)) {
			switch (be32_to_cpup(prop)) {
			case SPI_NBITS_SINGLE:
				break;
@@ -903,18 +898,16 @@ static void of_register_spi_devices(struct spi_master *master)
				spi->mode |= SPI_TX_QUAD;
				break;
			default:
			dev_err(&master->dev, "spi-tx-nbits value is not supported\n");
				dev_err(&master->dev,
					"spi-tx-bus-width %d not supported\n",
					be32_to_cpup(prop));
				spi_dev_put(spi);
				continue;
			}

		prop = of_get_property(nc, "spi-rx-nbits", &len);
		if (!prop || len < sizeof(*prop)) {
			dev_err(&master->dev, "%s has no 'spi-rx-nbits' property\n",
				nc->full_name);
			spi_dev_put(spi);
			continue;
		}

		prop = of_get_property(nc, "spi-rx-bus-width", &len);
		if (prop && len == sizeof(*prop)) {
			switch (be32_to_cpup(prop)) {
			case SPI_NBITS_SINGLE:
				break;
@@ -925,10 +918,13 @@ static void of_register_spi_devices(struct spi_master *master)
				spi->mode |= SPI_RX_QUAD;
				break;
			default:
			dev_err(&master->dev, "spi-rx-nbits value is not supported\n");
				dev_err(&master->dev,
					"spi-rx-bus-width %d not supported\n",
					be32_to_cpup(prop));
				spi_dev_put(spi);
				continue;
			}
		}

		/* Device speed */
		prop = of_get_property(nc, "spi-max-frequency", &len);
@@ -1480,6 +1476,7 @@ static int __spi_async(struct spi_device *spi, struct spi_message *message)
			return -EINVAL;
		if (xfer->speed_hz && master->max_speed_hz &&
		    xfer->speed_hz > master->max_speed_hz)
			return -EINVAL;

		if (xfer->tx_buf && !xfer->tx_nbits)
			xfer->tx_nbits = SPI_NBITS_SINGLE;