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Commit 85cac431 authored by Mark Brown's avatar Mark Brown
Browse files

Merge remote-tracking branch 'spi/topic/qspi' into spi-next

parents 793b3cb6 b6460366

Documentation/devicetree/bindings/spi/ti_qspi.txt

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TI QSPI controller.



Required properties:

- compatible : should be "ti,dra7xxx-qspi" or "ti,am4372-qspi".

- reg: Should contain QSPI registers location and length.

- #address-cells, #size-cells : Must be present if the device has sub-nodes

- ti,hwmods: Name of the hwmod associated to the QSPI



Recommended properties:

- spi-max-frequency: Definition as per

                     Documentation/devicetree/bindings/spi/spi-bus.txt



Example:



qspi: qspi@4b300000 {

	compatible = "ti,dra7xxx-qspi";

	reg = <0x4b300000 0x100>;

	#address-cells = <1>;

	#size-cells = <0>;

	spi-max-frequency = <25000000>;

	ti,hwmods = "qspi";

};

drivers/spi/Kconfig

+8 −0
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@@ -306,6 +306,14 @@ config SPI_OMAP24XX 
	  SPI master controller for OMAP24XX and later Multichannel SPI

	  (McSPI) modules.



config SPI_TI_QSPI

	tristate "DRA7xxx QSPI controller support"

	depends on ARCH_OMAP2PLUS || COMPILE_TEST

	help

	  QSPI master controller for DRA7xxx used for flash devices.

	  This device supports single, dual and quad read support, while

	  it only supports single write mode.



config SPI_OMAP_100K

	tristate "OMAP SPI 100K"

	depends on ARCH_OMAP850 || ARCH_OMAP730 || COMPILE_TEST

drivers/spi/Makefile

+1 −0
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@@ -49,6 +49,7 @@ obj-$(CONFIG_SPI_OCTEON) += spi-octeon.o 
obj-$(CONFIG_SPI_OMAP_UWIRE)		+= spi-omap-uwire.o

obj-$(CONFIG_SPI_OMAP_100K)		+= spi-omap-100k.o

obj-$(CONFIG_SPI_OMAP24XX)		+= spi-omap2-mcspi.o

obj-$(CONFIG_SPI_TI_QSPI)		+= spi-ti-qspi.o

obj-$(CONFIG_SPI_ORION)			+= spi-orion.o

obj-$(CONFIG_SPI_PL022)			+= spi-pl022.o

obj-$(CONFIG_SPI_PPC4xx)		+= spi-ppc4xx.o

drivers/spi/spi-bcm63xx.c

+1 −20
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@@ -231,24 +231,6 @@ static int bcm63xx_txrx_bufs(struct spi_device *spi, struct spi_transfer *first, 
	return 0;

}



static int bcm63xx_spi_prepare_transfer(struct spi_master *master)

{

	struct bcm63xx_spi *bs = spi_master_get_devdata(master);



	pm_runtime_get_sync(&bs->pdev->dev);



	return 0;

}



static int bcm63xx_spi_unprepare_transfer(struct spi_master *master)

{

	struct bcm63xx_spi *bs = spi_master_get_devdata(master);



	pm_runtime_put(&bs->pdev->dev);



	return 0;

}



static int bcm63xx_spi_transfer_one(struct spi_master *master,

					struct spi_message *m)

{
@@ -406,11 +388,10 @@ static int bcm63xx_spi_probe(struct platform_device *pdev) 


	master->bus_num = pdata->bus_num;

	master->num_chipselect = pdata->num_chipselect;

	master->prepare_transfer_hardware = bcm63xx_spi_prepare_transfer;

	master->unprepare_transfer_hardware = bcm63xx_spi_unprepare_transfer;

	master->transfer_one_message = bcm63xx_spi_transfer_one;

	master->mode_bits = MODEBITS;

	master->bits_per_word_mask = SPI_BPW_MASK(8);

	master->auto_runtime_pm = true;

	bs->msg_type_shift = pdata->msg_type_shift;

	bs->msg_ctl_width = pdata->msg_ctl_width;

	bs->tx_io = (u8 *)(bs->regs + bcm63xx_spireg(SPI_MSG_DATA));

drivers/spi/spi-coldfire-qspi.c

+1 −20
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@@ -354,24 +354,6 @@ static int mcfqspi_transfer_one_message(struct spi_master *master, 


}



static int mcfqspi_prepare_transfer_hw(struct spi_master *master)

{

	struct mcfqspi *mcfqspi = spi_master_get_devdata(master);



	pm_runtime_get_sync(mcfqspi->dev);



	return 0;

}



static int mcfqspi_unprepare_transfer_hw(struct spi_master *master)

{

	struct mcfqspi *mcfqspi = spi_master_get_devdata(master);



	pm_runtime_put_sync(mcfqspi->dev);



	return 0;

}



static int mcfqspi_setup(struct spi_device *spi)

{

	if (spi->chip_select >= spi->master->num_chipselect) {
@@ -473,8 +455,7 @@ static int mcfqspi_probe(struct platform_device *pdev) 
	master->bits_per_word_mask = SPI_BPW_RANGE_MASK(8, 16);

	master->setup = mcfqspi_setup;

	master->transfer_one_message = mcfqspi_transfer_one_message;

	master->prepare_transfer_hardware = mcfqspi_prepare_transfer_hw;

	master->unprepare_transfer_hardware = mcfqspi_unprepare_transfer_hw;

	master->auto_runtime_pm = true;



	platform_set_drvdata(pdev, master);