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Commit 26679899 authored by Rex Zhu's avatar Rex Zhu Committed by Alex Deucher
Browse files

drm/amdgpu: refine vce_3.0 code. 



fix logic error in hw_fini and
set_clockgating_state functions.

Signed-off-by: default avatarRex Zhu <Rex.Zhu@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 03a5f1df

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

+7 −9
Original line number Diff line number Diff line
@@ -65,7 +65,8 @@ static void vce_v3_0_mc_resume(struct amdgpu_device *adev, int idx); 
static void vce_v3_0_set_ring_funcs(struct amdgpu_device *adev);

static void vce_v3_0_set_irq_funcs(struct amdgpu_device *adev);

static int vce_v3_0_wait_for_idle(void *handle);



static int vce_v3_0_set_clockgating_state(void *handle,

					  enum amd_clockgating_state state);

/**

 * vce_v3_0_ring_get_rptr - get read pointer

 *
@@ -305,12 +306,8 @@ static int vce_v3_0_stop(struct amdgpu_device *adev) 
		/* hold on ECPU */

		WREG32_FIELD(VCE_SOFT_RESET, ECPU_SOFT_RESET, 1);



		/* clear BUSY flag */

		WREG32_FIELD(VCE_STATUS, JOB_BUSY, 0);



		/* Set Clock-Gating off */

		if (adev->cg_flags & AMD_CG_SUPPORT_VCE_MGCG)

			vce_v3_0_set_vce_sw_clock_gating(adev, false);

		/* clear VCE STATUS */

		WREG32(mmVCE_STATUS, 0);

	}



	WREG32(mmGRBM_GFX_INDEX, mmGRBM_GFX_INDEX_DEFAULT);
@@ -461,7 +458,8 @@ static int vce_v3_0_hw_fini(void *handle) 
	if (r)

		return r;



	return vce_v3_0_stop(adev);

	vce_v3_0_stop(adev);

	return vce_v3_0_set_clockgating_state(adev, AMD_CG_STATE_GATE);

}



static int vce_v3_0_suspend(void *handle)
@@ -728,7 +726,7 @@ static int vce_v3_0_set_clockgating_state(void *handle, 


		WREG32(mmGRBM_GFX_INDEX, GET_VCE_INSTANCE(i));



		if (enable) {

		if (!enable) {

			/* initialize VCE_CLOCK_GATING_A: Clock ON/OFF delay */

			uint32_t data = RREG32(mmVCE_CLOCK_GATING_A);

			data &= ~(0xf | 0xff0);