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Commit 03a5f1df authored by Rex Zhu's avatar Rex Zhu Committed by Alex Deucher
Browse files

drm/amdgpu: refine vce2.0 dpm sequence



start vce first then enable vce dpm.

Signed-off-by: default avatarRex Zhu <Rex.Zhu@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent c5e38e11
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+3 −3
Original line number Diff line number Diff line
@@ -1316,11 +1316,11 @@ void amdgpu_dpm_enable_vce(struct amdgpu_device *adev, bool enable)
			/* XXX select vce level based on ring/task */
			adev->pm.dpm.vce_level = AMD_VCE_LEVEL_AC_ALL;
			mutex_unlock(&adev->pm.mutex);
			amdgpu_pm_compute_clocks(adev);
			amdgpu_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_VCE,
							AMD_PG_STATE_UNGATE);
			amdgpu_set_clockgating_state(adev, AMD_IP_BLOCK_TYPE_VCE,
							AMD_CG_STATE_UNGATE);
			amdgpu_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_VCE,
							AMD_PG_STATE_UNGATE);
			amdgpu_pm_compute_clocks(adev);
		} else {
			amdgpu_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_VCE,
							AMD_PG_STATE_GATE);