Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 1fd73c6b authored by Ravikiran G Thirumalai's avatar Ravikiran G Thirumalai Committed by Linus Torvalds
Browse files

[PATCH] Kill L1_CACHE_SHIFT_MAX 



Kill L1_CACHE_SHIFT from all arches.  Since L1_CACHE_SHIFT_MAX is not used
anymore with the introduction of INTERNODE_CACHE, kill L1_CACHE_SHIFT_MAX.

Signed-off-by: default avatarRavikiran Thirumalai <kiran@scalex86.org>
Signed-off-by: default avatarShai Fultheim <shai@scalex86.org>
Signed-off-by: default avatarAndi Kleen <ak@suse.de>
Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
parent 22fc6ecc

include/asm-alpha/cache.h

+0 −1
Original line number Diff line number Diff line
@@ -20,6 +20,5 @@ 


#define L1_CACHE_ALIGN(x)  (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1))

#define SMP_CACHE_BYTES    L1_CACHE_BYTES

#define L1_CACHE_SHIFT_MAX L1_CACHE_SHIFT



#endif

include/asm-arm/cache.h

+0 −5
Original line number Diff line number Diff line
@@ -7,9 +7,4 @@ 
#define L1_CACHE_SHIFT		5

#define L1_CACHE_BYTES		(1 << L1_CACHE_SHIFT)



/*

 * largest L1 which this arch supports

 */

#define L1_CACHE_SHIFT_MAX	5



#endif

include/asm-cris/arch-v10/cache.h

+0 −1
Original line number Diff line number Diff line
@@ -4,6 +4,5 @@ 
/* Etrax 100LX have 32-byte cache-lines. */

#define L1_CACHE_BYTES 32

#define L1_CACHE_SHIFT 5

#define L1_CACHE_SHIFT_MAX 5



#endif /* _ASM_ARCH_CACHE_H */

include/asm-cris/arch-v32/cache.h

+0 −1
Original line number Diff line number Diff line
@@ -4,6 +4,5 @@ 
/* A cache-line is 32 bytes. */

#define L1_CACHE_BYTES 32

#define L1_CACHE_SHIFT 5

#define L1_CACHE_SHIFT_MAX 5



#endif /* _ASM_CRIS_ARCH_CACHE_H */

include/asm-cris/dma-mapping.h

+1 −1
Original line number Diff line number Diff line
@@ -153,7 +153,7 @@ dma_set_mask(struct device *dev, u64 mask) 
static inline int

dma_get_cache_alignment(void)

{

	return (1 << L1_CACHE_SHIFT_MAX);

	return (1 << INTERNODE_CACHE_SHIFT);

}



#define dma_is_consistent(d)	(1)