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Commit 1e09dec9 authored by Horia Geantă's avatar Horia Geantă Committed by Shawn Guo
Browse files

arm64: dts: freescale: ls1088a: add crypto node 



LS1088A has a SEC v5.3 security engine.

Signed-off-by: default avatarHoria Geantă <horia.geanta@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent a5153230

arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi

+43 −0
Original line number Diff line number Diff line
@@ -52,6 +52,10 @@ 
	#address-cells = <2>;

	#size-cells = <2>;



	aliases {

		crypto = &crypto;

	};



	cpus {

		#address-cells = <1>;

		#size-cells = <0>;
@@ -369,6 +373,45 @@ 
			dma-coherent;

			status = "disabled";

		};



		crypto: crypto@8000000 {

			compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";

			fsl,sec-era = <8>;

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0x0 0x00 0x8000000 0x100000>;

			reg = <0x00 0x8000000 0x0 0x100000>;

			interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;

			dma-coherent;



			sec_jr0: jr@10000 {

				compatible = "fsl,sec-v5.0-job-ring",

					     "fsl,sec-v4.0-job-ring";

				reg	   = <0x10000 0x10000>;

				interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;

			};



			sec_jr1: jr@20000 {

				compatible = "fsl,sec-v5.0-job-ring",

					     "fsl,sec-v4.0-job-ring";

				reg	   = <0x20000 0x10000>;

				interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;

			};



			sec_jr2: jr@30000 {

				compatible = "fsl,sec-v5.0-job-ring",

					     "fsl,sec-v4.0-job-ring";

				reg	   = <0x30000 0x10000>;

				interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>;

			};



			sec_jr3: jr@40000 {

				compatible = "fsl,sec-v5.0-job-ring",

					     "fsl,sec-v4.0-job-ring";

				reg	   = <0x40000 0x10000>;

				interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;

			};

		};

	};



};