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Commit a5153230 authored by Horia Geantă's avatar Horia Geantă Committed by Shawn Guo
Browse files

arm64: dts: freescale: ls208xa: add crypto node 



LS208xA has a SEC v5.1 security engine.

Signed-off-by: default avatarHoria Geantă <horia.geanta@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 90034d1b

arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi

+41 −0
Original line number Diff line number Diff line
@@ -46,6 +46,7 @@ 
 */



#include <dt-bindings/thermal/thermal.h>

#include <dt-bindings/interrupt-controller/arm-gic.h>



/ {

	compatible = "fsl,ls2080a";
@@ -54,6 +55,7 @@ 
	#size-cells = <2>;



	aliases {

		crypto = &crypto;

		serial0 = &serial0;

		serial1 = &serial1;

	};
@@ -306,6 +308,45 @@ 
			clock-names = "apb_pclk", "wdog_clk";

		};



		crypto: crypto@8000000 {

			compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";

			fsl,sec-era = <8>;

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0x0 0x00 0x8000000 0x100000>;

			reg = <0x00 0x8000000 0x0 0x100000>;

			interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;

			dma-coherent;



			sec_jr0: jr@10000 {

				compatible = "fsl,sec-v5.0-job-ring",

					     "fsl,sec-v4.0-job-ring";

				reg	   = <0x10000 0x10000>;

				interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;

			};



			sec_jr1: jr@20000 {

				compatible = "fsl,sec-v5.0-job-ring",

					     "fsl,sec-v4.0-job-ring";

				reg	   = <0x20000 0x10000>;

				interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;

			};



			sec_jr2: jr@30000 {

				compatible = "fsl,sec-v5.0-job-ring",

					     "fsl,sec-v4.0-job-ring";

				reg	   = <0x30000 0x10000>;

				interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>;

			};



			sec_jr3: jr@40000 {

				compatible = "fsl,sec-v5.0-job-ring",

					     "fsl,sec-v4.0-job-ring";

				reg	   = <0x40000 0x10000>;

				interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;

			};

		};



		fsl_mc: fsl-mc@80c000000 {

			compatible = "fsl,qoriq-mc";

			reg = <0x00000008 0x0c000000 0 0x40>,	 /* MC portal base */