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Commit 0f75e1a3 authored by Stephen Boyd's avatar Stephen Boyd
Browse files

clk: qcom: msm8960: Fix ce3_src register offset 



The offset seems to have been copied from the sata clk. Fix it so
that enabling the crypto engine source clk works.

Tested-by: default avatarSrinivas Kandagatla <srinivas.kandagatla@linaro.org>
Tested-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
Fixes: 5f775498 ("clk: qcom: Fully support apq8064 global clock control")
Signed-off-by: default avatarStephen Boyd <sboyd@codeaurora.org>
parent 3b0f4ae3

drivers/clk/qcom/gcc-msm8960.c

+1 −1
Original line number Diff line number Diff line
@@ -2753,7 +2753,7 @@ static struct clk_rcg ce3_src = { 
	},

	.freq_tbl = clk_tbl_ce3,

	.clkr = {

		.enable_reg = 0x2c08,

		.enable_reg = 0x36c0,

		.enable_mask = BIT(7),

		.hw.init = &(struct clk_init_data){

			.name = "ce3_src",