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Commit 0bac2378 authored by Thomas Gleixner's avatar Thomas Gleixner Committed by Ingo Molnar
Browse files

perf/x86/intel/cqm: Avoid pointless MSR write 



If the usage counter is non-zero there is no point to update the rmid
in the PQR MSR.

Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Signed-off-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: default avatarMatt Fleming <matt.fleming@intel.com>
Cc: Kanaka Juvva <kanaka.d.juvva@intel.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Vikas Shivappa <vikas.shivappa@linux.intel.com>
Cc: Will Auld <will.auld@intel.com>
Link: http://lkml.kernel.org/r/20150518235150.080844281@linutronix.de


Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
parent 9e7eaac9

arch/x86/kernel/cpu/perf_event_intel_cqm.c

+5 −3
Original line number Diff line number Diff line
@@ -974,10 +974,12 @@ static void intel_cqm_event_start(struct perf_event *event, int mode) 


	event->hw.cqm_state &= ~PERF_HES_STOPPED;



	if (state->cnt++)

		WARN_ON_ONCE(state->rmid != rmid);

	else

	if (state->cnt++) {

		if (!WARN_ON_ONCE(state->rmid != rmid))

			return;

	} else {

		WARN_ON_ONCE(state->rmid);

	}



	state->rmid = rmid;

	/*