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Commit ffddc436 authored by Manasi Navare's avatar Manasi Navare
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drm/dp: Add DP DSC DPCD receiver capability size define and missing SHIFT 



This patch defines the DP DSC receiver capability size that gives
total number of DP DSC DPCD registers.
This also adds a missing #defines for DP DSC support missed in the
commit id (ab6a46ea "Add DPCD definitions for DP 1.4 DSC feature")

v3:
* MIN_SLICE_WIDTH = 2560 (Anusha)
* Define DP_DSC_SLICE_WIDTH_MULTIPLIER = 320
v2:
* Add SHIFT define and DECOMPRESSION_EN define missed in prev patch

Cc: dri-devel@lists.freedesktop.org
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Cc: Gaurav K Singh <gaurav.k.singh@intel.com>
Signed-off-by: default avatarManasi Navare <manasi.d.navare@intel.com>
Acked-by: Sean Paul <seanpaul@chromium.org> (For merging through
drm-intel)
Reviewed-by: default avatarAnusha Srivatsa <anusha.srivatsa@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181031001923.31442-2-manasi.d.navare@intel.com
parent 35b876db

include/drm/drm_dp_helper.h

+6 −0
Original line number Diff line number Diff line
@@ -231,6 +231,8 @@ 
#define DP_DSC_MAX_BITS_PER_PIXEL_LOW       0x067   /* eDP 1.4 */



#define DP_DSC_MAX_BITS_PER_PIXEL_HI        0x068   /* eDP 1.4 */

# define DP_DSC_MAX_BITS_PER_PIXEL_HI_MASK  (0x3 << 0)

# define DP_DSC_MAX_BITS_PER_PIXEL_HI_SHIFT 8



#define DP_DSC_DEC_COLOR_FORMAT_CAP         0x069

# define DP_DSC_RGB                         (1 << 0)
@@ -279,6 +281,8 @@ 
# define DP_DSC_THROUGHPUT_MODE_1_1000      (14 << 4)



#define DP_DSC_MAX_SLICE_WIDTH              0x06C

#define DP_DSC_MIN_SLICE_WIDTH_VALUE        2560

#define DP_DSC_SLICE_WIDTH_MULTIPLIER       320



#define DP_DSC_SLICE_CAP_2                  0x06D

# define DP_DSC_16_PER_DP_DSC_SINK          (1 << 0)
@@ -477,6 +481,7 @@ 
# define DP_AUX_FRAME_SYNC_VALID	    (1 << 0)



#define DP_DSC_ENABLE                       0x160   /* DP 1.4 */

# define DP_DECOMPRESSION_EN                (1 << 0)



#define DP_PSR_EN_CFG			    0x170   /* XXX 1.2? */

# define DP_PSR_ENABLE			    (1 << 0)
@@ -1014,6 +1019,7 @@ u8 drm_dp_get_adjust_request_pre_emphasis(const u8 link_status[DP_LINK_STATUS_SI 


#define DP_BRANCH_OUI_HEADER_SIZE	0xc

#define DP_RECEIVER_CAP_SIZE		0xf

#define DP_DSC_RECEIVER_CAP_SIZE        0xf

#define EDP_PSR_RECEIVER_CAP_SIZE	2

#define EDP_DISPLAY_CTL_CAP_SIZE	3