disp: msm: sde: program misr at encoder kickoff stage

As per current design misr enable sequence is happening at
atomic check level. At this state, misr configuration may reset
if clocks are enabled through atomic commit sequence. This change
moves misr enable/disable sequence from debugfs context to
encoder kickoff to avoid misr register reset with idle pc.

Change-Id: Ia4faa200f96b76ba8c7ef3f45a26108e34b5e687
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>