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Commit f435fe83 authored by Sean Paul's avatar Sean Paul
Browse files

Merge tag 'topic/hdr-formats-2019-03-13' of... 

Merge tag 'topic/hdr-formats-2019-03-13' of git://anongit.freedesktop.org/drm/drm-misc

 into drm-misc-next

Add support for floating point half-width formats.

Signed-off-by: default avatarSean Paul <seanpaul@chromium.org>

From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/00b96cd5-91c7-5677-9620-b138c7a92303@linux.intel.com
parents a0689e34 a94bed60

drivers/gpu/drm/drm_fourcc.c

+4 −0
Original line number Diff line number Diff line
@@ -198,6 +198,10 @@ const struct drm_format_info *__drm_format_info(u32 format) 
		{ .format = DRM_FORMAT_ABGR8888,	.depth = 32, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true },

		{ .format = DRM_FORMAT_RGBA8888,	.depth = 32, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true },

		{ .format = DRM_FORMAT_BGRA8888,	.depth = 32, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true },

		{ .format = DRM_FORMAT_XRGB16161616F,	.depth = 0,  .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1 },

		{ .format = DRM_FORMAT_XBGR16161616F,	.depth = 0,  .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1 },

		{ .format = DRM_FORMAT_ARGB16161616F,	.depth = 0,  .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true },

		{ .format = DRM_FORMAT_ABGR16161616F,	.depth = 0,  .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true },

		{ .format = DRM_FORMAT_RGB888_A8,	.depth = 32, .num_planes = 2, .cpp = { 3, 1, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true },

		{ .format = DRM_FORMAT_BGR888_A8,	.depth = 32, .num_planes = 2, .cpp = { 3, 1, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true },

		{ .format = DRM_FORMAT_XRGB8888_A8,	.depth = 32, .num_planes = 2, .cpp = { 4, 1, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true },

drivers/gpu/drm/i915/intel_atomic.c

+2 −1
Original line number Diff line number Diff line
@@ -235,10 +235,11 @@ static void intel_atomic_setup_scaler(struct intel_crtc_scaler_state *scaler_sta 
	if (plane_state && plane_state->base.fb &&

	    plane_state->base.fb->format->is_yuv &&

	    plane_state->base.fb->format->num_planes > 1) {

		struct intel_plane *plane = to_intel_plane(plane_state->base.plane);

		if (IS_GEN(dev_priv, 9) &&

		    !IS_GEMINILAKE(dev_priv)) {

			mode = SKL_PS_SCALER_MODE_NV12;

		} else if (icl_is_hdr_plane(to_intel_plane(plane_state->base.plane))) {

		} else if (icl_is_hdr_plane(dev_priv, plane->id)) {

			/*

			 * On gen11+'s HDR planes we only use the scaler for

			 * scaling. They have a dedicated chroma upsampler, so

drivers/gpu/drm/i915/intel_display.c

+27 −2
Original line number Diff line number Diff line
@@ -2713,6 +2713,18 @@ int skl_format_to_fourcc(int format, bool rgb_order, bool alpha) 
			return DRM_FORMAT_XBGR2101010;

		else

			return DRM_FORMAT_XRGB2101010;

	case PLANE_CTL_FORMAT_XRGB_16161616F:

		if (rgb_order) {

			if (alpha)

				return DRM_FORMAT_ABGR16161616F;

			else

				return DRM_FORMAT_XBGR16161616F;

		} else {

			if (alpha)

				return DRM_FORMAT_ARGB16161616F;

			else

				return DRM_FORMAT_XRGB16161616F;

		}

	}

}
@@ -3608,6 +3620,12 @@ static u32 skl_plane_ctl_format(u32 pixel_format) 
		return PLANE_CTL_FORMAT_XRGB_2101010;

	case DRM_FORMAT_XBGR2101010:

		return PLANE_CTL_ORDER_RGBX | PLANE_CTL_FORMAT_XRGB_2101010;

	case DRM_FORMAT_XBGR16161616F:

	case DRM_FORMAT_ABGR16161616F:

		return PLANE_CTL_FORMAT_XRGB_16161616F | PLANE_CTL_ORDER_RGBX;

	case DRM_FORMAT_XRGB16161616F:

	case DRM_FORMAT_ARGB16161616F:

		return PLANE_CTL_FORMAT_XRGB_16161616F;

	case DRM_FORMAT_YUYV:

		return PLANE_CTL_FORMAT_YUV422 | PLANE_CTL_YUV422_YUYV;

	case DRM_FORMAT_YVYU:
@@ -3808,6 +3826,8 @@ u32 glk_plane_color_ctl_crtc(const struct intel_crtc_state *crtc_state) 
u32 glk_plane_color_ctl(const struct intel_crtc_state *crtc_state,

			const struct intel_plane_state *plane_state)

{

	struct drm_i915_private *dev_priv =

		to_i915(plane_state->base.plane->dev);

	const struct drm_framebuffer *fb = plane_state->base.fb;

	struct intel_plane *plane = to_intel_plane(plane_state->base.plane);

	u32 plane_color_ctl = 0;
@@ -3815,7 +3835,7 @@ u32 glk_plane_color_ctl(const struct intel_crtc_state *crtc_state, 
	plane_color_ctl |= PLANE_COLOR_PLANE_GAMMA_DISABLE;

	plane_color_ctl |= glk_plane_color_ctl_alpha(plane_state);



	if (fb->format->is_yuv && !icl_is_hdr_plane(plane)) {

	if (fb->format->is_yuv && !icl_is_hdr_plane(dev_priv, plane->id)) {

		if (plane_state->base.color_encoding == DRM_COLOR_YCBCR_BT709)

			plane_color_ctl |= PLANE_COLOR_CSC_MODE_YUV709_TO_RGB709;

		else
@@ -5141,13 +5161,14 @@ static int skl_update_scaler_plane(struct intel_crtc_state *crtc_state, 
{

	struct intel_plane *intel_plane =

		to_intel_plane(plane_state->base.plane);

	struct drm_i915_private *dev_priv = to_i915(intel_plane->base.dev);

	struct drm_framebuffer *fb = plane_state->base.fb;

	int ret;

	bool force_detach = !fb || !plane_state->base.visible;

	bool need_scaler = false;



	/* Pre-gen11 and SDR planes always need a scaler for planar formats. */

	if (!icl_is_hdr_plane(intel_plane) &&

	if (!icl_is_hdr_plane(dev_priv, intel_plane->id) &&

	    fb && is_planar_yuv_format(fb->format->format))

		need_scaler = true;
@@ -5180,6 +5201,10 @@ static int skl_update_scaler_plane(struct intel_crtc_state *crtc_state, 
	case DRM_FORMAT_ARGB8888:

	case DRM_FORMAT_XRGB2101010:

	case DRM_FORMAT_XBGR2101010:

	case DRM_FORMAT_XBGR16161616F:

	case DRM_FORMAT_ABGR16161616F:

	case DRM_FORMAT_XRGB16161616F:

	case DRM_FORMAT_ARGB16161616F:

	case DRM_FORMAT_YUYV:

	case DRM_FORMAT_YVYU:

	case DRM_FORMAT_UYVY:

drivers/gpu/drm/i915/intel_drv.h

+4 −3
Original line number Diff line number Diff line
@@ -2326,12 +2326,13 @@ static inline bool icl_is_nv12_y_plane(enum plane_id id) 
	return false;

}



static inline bool icl_is_hdr_plane(struct intel_plane *plane)

static inline bool icl_is_hdr_plane(struct drm_i915_private *dev_priv,

				    enum plane_id plane_id)

{

	if (INTEL_GEN(to_i915(plane->base.dev)) < 11)

	if (INTEL_GEN(dev_priv) < 11)

		return false;



	return plane->id < PLANE_SPRITE2;

	return plane_id < PLANE_SPRITE2;

}



/* intel_tv.c */

drivers/gpu/drm/i915/intel_sprite.c

+72 −6
Original line number Diff line number Diff line
@@ -349,7 +349,7 @@ skl_program_scaler(struct intel_plane *plane, 


	/* TODO: handle sub-pixel coordinates */

	if (is_planar_yuv_format(plane_state->base.fb->format->format) &&

	    !icl_is_hdr_plane(plane)) {

	    !icl_is_hdr_plane(dev_priv, plane->id)) {

		y_hphase = skl_scaler_calc_phase(1, hscale, false);

		y_vphase = skl_scaler_calc_phase(1, vscale, false);
@@ -531,7 +531,7 @@ skl_program_plane(struct intel_plane *plane, 
	I915_WRITE_FW(PLANE_AUX_DIST(pipe, plane_id),

		      (plane_state->color_plane[1].offset - surf_addr) | aux_stride);



	if (icl_is_hdr_plane(plane)) {

	if (icl_is_hdr_plane(dev_priv, plane_id)) {

		u32 cus_ctl = 0;



		if (linked) {
@@ -555,7 +555,7 @@ skl_program_plane(struct intel_plane *plane, 
	if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))

		I915_WRITE_FW(PLANE_COLOR_CTL(pipe, plane_id), plane_color_ctl);



	if (fb->format->is_yuv && icl_is_hdr_plane(plane))

	if (fb->format->is_yuv && icl_is_hdr_plane(dev_priv, plane_id))

		icl_program_input_csc(plane, crtc_state, plane_state);



	skl_write_plane_wm(plane, crtc_state);
@@ -1495,8 +1495,6 @@ static int skl_plane_check_fb(const struct intel_crtc_state *crtc_state, 
		/*

		 * 90/270 is not allowed with RGB64 16:16:16:16 and

		 * Indexed 8-bit. RGB 16-bit 5:6:5 is allowed gen11 onwards.

		 * TBD: Add RGB64 case once its added in supported format

		 * list.

		 */

		switch (fb->format->format) {

		case DRM_FORMAT_RGB565:
@@ -1504,6 +1502,10 @@ static int skl_plane_check_fb(const struct intel_crtc_state *crtc_state, 
				break;

			/* fall through */

		case DRM_FORMAT_C8:

		case DRM_FORMAT_XRGB16161616F:

		case DRM_FORMAT_XBGR16161616F:

		case DRM_FORMAT_ARGB16161616F:

		case DRM_FORMAT_ABGR16161616F:

			DRM_DEBUG_KMS("Unsupported pixel format %s for 90/270!\n",

				      drm_get_format_name(fb->format->format,

							  &format_name));
@@ -1824,6 +1826,31 @@ static const uint32_t icl_plane_formats[] = { 
	DRM_FORMAT_Y416,

};



static const uint32_t icl_hdr_plane_formats[] = {

	DRM_FORMAT_C8,

	DRM_FORMAT_RGB565,

	DRM_FORMAT_XRGB8888,

	DRM_FORMAT_XBGR8888,

	DRM_FORMAT_ARGB8888,

	DRM_FORMAT_ABGR8888,

	DRM_FORMAT_XRGB2101010,

	DRM_FORMAT_XBGR2101010,

	DRM_FORMAT_XRGB16161616F,

	DRM_FORMAT_XBGR16161616F,

	DRM_FORMAT_ARGB16161616F,

	DRM_FORMAT_ABGR16161616F,

	DRM_FORMAT_YUYV,

	DRM_FORMAT_YVYU,

	DRM_FORMAT_UYVY,

	DRM_FORMAT_VYUY,

	DRM_FORMAT_Y210,

	DRM_FORMAT_Y212,

	DRM_FORMAT_Y216,

	DRM_FORMAT_Y410,

	DRM_FORMAT_Y412,

	DRM_FORMAT_Y416,

};



static const u32 skl_planar_formats[] = {

	DRM_FORMAT_C8,

	DRM_FORMAT_RGB565,
@@ -1884,6 +1911,35 @@ static const uint32_t icl_planar_formats[] = { 
	DRM_FORMAT_Y416,

};



static const uint32_t icl_hdr_planar_formats[] = {

	DRM_FORMAT_C8,

	DRM_FORMAT_RGB565,

	DRM_FORMAT_XRGB8888,

	DRM_FORMAT_XBGR8888,

	DRM_FORMAT_ARGB8888,

	DRM_FORMAT_ABGR8888,

	DRM_FORMAT_XRGB2101010,

	DRM_FORMAT_XBGR2101010,

	DRM_FORMAT_XRGB16161616F,

	DRM_FORMAT_XBGR16161616F,

	DRM_FORMAT_ARGB16161616F,

	DRM_FORMAT_ABGR16161616F,

	DRM_FORMAT_YUYV,

	DRM_FORMAT_YVYU,

	DRM_FORMAT_UYVY,

	DRM_FORMAT_VYUY,

	DRM_FORMAT_NV12,

	DRM_FORMAT_P010,

	DRM_FORMAT_P012,

	DRM_FORMAT_P016,

	DRM_FORMAT_Y210,

	DRM_FORMAT_Y212,

	DRM_FORMAT_Y216,

	DRM_FORMAT_Y410,

	DRM_FORMAT_Y412,

	DRM_FORMAT_Y416,

};



static const u64 skl_plane_format_modifiers_noccs[] = {

	I915_FORMAT_MOD_Yf_TILED,

	I915_FORMAT_MOD_Y_TILED,
@@ -2036,6 +2092,10 @@ static bool skl_plane_format_mod_supported(struct drm_plane *_plane, 
			return true;

		/* fall through */

	case DRM_FORMAT_C8:

	case DRM_FORMAT_XBGR16161616F:

	case DRM_FORMAT_ABGR16161616F:

	case DRM_FORMAT_XRGB16161616F:

	case DRM_FORMAT_ARGB16161616F:

		if (modifier == DRM_FORMAT_MOD_LINEAR ||

		    modifier == I915_FORMAT_MOD_X_TILED ||

		    modifier == I915_FORMAT_MOD_Y_TILED)
@@ -2172,7 +2232,10 @@ skl_universal_plane_create(struct drm_i915_private *dev_priv, 
		plane->update_slave = icl_update_slave;



	if (skl_plane_has_planar(dev_priv, pipe, plane_id)) {

		if (INTEL_GEN(dev_priv) >= 11) {

		if (icl_is_hdr_plane(dev_priv, plane_id)) {

			formats = icl_hdr_planar_formats;

			num_formats = ARRAY_SIZE(icl_hdr_planar_formats);

		} else if (INTEL_GEN(dev_priv) >= 11) {

			formats = icl_planar_formats;

			num_formats = ARRAY_SIZE(icl_planar_formats);

		} else if (INTEL_GEN(dev_priv) == 10 || IS_GEMINILAKE(dev_priv)) {
@@ -2182,6 +2245,9 @@ skl_universal_plane_create(struct drm_i915_private *dev_priv, 
			formats = skl_planar_formats;

			num_formats = ARRAY_SIZE(skl_planar_formats);

		}

	} else if (icl_is_hdr_plane(dev_priv, plane_id)) {

		formats = icl_hdr_plane_formats;

		num_formats = ARRAY_SIZE(icl_hdr_plane_formats);

	} else if (INTEL_GEN(dev_priv) >= 11) {

		formats = icl_plane_formats;

		num_formats = ARRAY_SIZE(icl_plane_formats);