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Commit a94bed60 authored by Kevin Strasser's avatar Kevin Strasser Committed by Maarten Lankhorst
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drm/i915/icl: Implement half float formats 



64 bpp half float formats are supported on hdr planes only and are subject
to the following restrictions:
  * 90/270 rotation not supported
  * Yf Tiling not supported
  * Frame Buffer Compression not supported
  * Color Keying not supported

v2:
- Drop handling pixel normalize register
- Don't use icl_is_hdr_plane too early

v3:
- Use refactored icl_is_hdr_plane (Ville)
- Use u32 instead of uint32_t (Ville)

v6:
- Rebase and fix merge conflicts
- Reorganize switch statements to keep RGB grouped separately from YUV

Cc: Uma Shankar <uma.shankar@intel.com>
Cc: Shashank Sharma <shashank.sharma@intel.com>
Cc: David Airlie <airlied@linux.ie>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: dri-devel@lists.freedesktop.org
Signed-off-by: default avatarKevin Strasser <kevin.strasser@intel.com>
Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: default avatarMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: default avatarAdam Jackson <ajax@redhat.com>
Acked-by: default avatarJani Nikula <jani.nikula@intel.com>
Signed-off-by: default avatarMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1552437513-22648-4-git-send-email-kevin.strasser@intel.com
parent 42fd20ed

drivers/gpu/drm/i915/intel_display.c

+22 −0
Original line number Diff line number Diff line
@@ -2713,6 +2713,18 @@ int skl_format_to_fourcc(int format, bool rgb_order, bool alpha) 
			return DRM_FORMAT_XBGR2101010;

		else

			return DRM_FORMAT_XRGB2101010;

	case PLANE_CTL_FORMAT_XRGB_16161616F:

		if (rgb_order) {

			if (alpha)

				return DRM_FORMAT_ABGR16161616F;

			else

				return DRM_FORMAT_XBGR16161616F;

		} else {

			if (alpha)

				return DRM_FORMAT_ARGB16161616F;

			else

				return DRM_FORMAT_XRGB16161616F;

		}

	}

}
@@ -3608,6 +3620,12 @@ static u32 skl_plane_ctl_format(u32 pixel_format) 
		return PLANE_CTL_FORMAT_XRGB_2101010;

	case DRM_FORMAT_XBGR2101010:

		return PLANE_CTL_ORDER_RGBX | PLANE_CTL_FORMAT_XRGB_2101010;

	case DRM_FORMAT_XBGR16161616F:

	case DRM_FORMAT_ABGR16161616F:

		return PLANE_CTL_FORMAT_XRGB_16161616F | PLANE_CTL_ORDER_RGBX;

	case DRM_FORMAT_XRGB16161616F:

	case DRM_FORMAT_ARGB16161616F:

		return PLANE_CTL_FORMAT_XRGB_16161616F;

	case DRM_FORMAT_YUYV:

		return PLANE_CTL_FORMAT_YUV422 | PLANE_CTL_YUV422_YUYV;

	case DRM_FORMAT_YVYU:
@@ -5183,6 +5201,10 @@ static int skl_update_scaler_plane(struct intel_crtc_state *crtc_state, 
	case DRM_FORMAT_ARGB8888:

	case DRM_FORMAT_XRGB2101010:

	case DRM_FORMAT_XBGR2101010:

	case DRM_FORMAT_XBGR16161616F:

	case DRM_FORMAT_ABGR16161616F:

	case DRM_FORMAT_XRGB16161616F:

	case DRM_FORMAT_ARGB16161616F:

	case DRM_FORMAT_YUYV:

	case DRM_FORMAT_YVYU:

	case DRM_FORMAT_UYVY:

drivers/gpu/drm/i915/intel_sprite.c

+69 −3
Original line number Diff line number Diff line
@@ -1495,8 +1495,6 @@ static int skl_plane_check_fb(const struct intel_crtc_state *crtc_state, 
		/*

		 * 90/270 is not allowed with RGB64 16:16:16:16 and

		 * Indexed 8-bit. RGB 16-bit 5:6:5 is allowed gen11 onwards.

		 * TBD: Add RGB64 case once its added in supported format

		 * list.

		 */

		switch (fb->format->format) {

		case DRM_FORMAT_RGB565:
@@ -1504,6 +1502,10 @@ static int skl_plane_check_fb(const struct intel_crtc_state *crtc_state, 
				break;

			/* fall through */

		case DRM_FORMAT_C8:

		case DRM_FORMAT_XRGB16161616F:

		case DRM_FORMAT_XBGR16161616F:

		case DRM_FORMAT_ARGB16161616F:

		case DRM_FORMAT_ABGR16161616F:

			DRM_DEBUG_KMS("Unsupported pixel format %s for 90/270!\n",

				      drm_get_format_name(fb->format->format,

							  &format_name));
@@ -1824,6 +1826,31 @@ static const uint32_t icl_plane_formats[] = { 
	DRM_FORMAT_Y416,

};



static const uint32_t icl_hdr_plane_formats[] = {

	DRM_FORMAT_C8,

	DRM_FORMAT_RGB565,

	DRM_FORMAT_XRGB8888,

	DRM_FORMAT_XBGR8888,

	DRM_FORMAT_ARGB8888,

	DRM_FORMAT_ABGR8888,

	DRM_FORMAT_XRGB2101010,

	DRM_FORMAT_XBGR2101010,

	DRM_FORMAT_XRGB16161616F,

	DRM_FORMAT_XBGR16161616F,

	DRM_FORMAT_ARGB16161616F,

	DRM_FORMAT_ABGR16161616F,

	DRM_FORMAT_YUYV,

	DRM_FORMAT_YVYU,

	DRM_FORMAT_UYVY,

	DRM_FORMAT_VYUY,

	DRM_FORMAT_Y210,

	DRM_FORMAT_Y212,

	DRM_FORMAT_Y216,

	DRM_FORMAT_Y410,

	DRM_FORMAT_Y412,

	DRM_FORMAT_Y416,

};



static const u32 skl_planar_formats[] = {

	DRM_FORMAT_C8,

	DRM_FORMAT_RGB565,
@@ -1884,6 +1911,35 @@ static const uint32_t icl_planar_formats[] = { 
	DRM_FORMAT_Y416,

};



static const uint32_t icl_hdr_planar_formats[] = {

	DRM_FORMAT_C8,

	DRM_FORMAT_RGB565,

	DRM_FORMAT_XRGB8888,

	DRM_FORMAT_XBGR8888,

	DRM_FORMAT_ARGB8888,

	DRM_FORMAT_ABGR8888,

	DRM_FORMAT_XRGB2101010,

	DRM_FORMAT_XBGR2101010,

	DRM_FORMAT_XRGB16161616F,

	DRM_FORMAT_XBGR16161616F,

	DRM_FORMAT_ARGB16161616F,

	DRM_FORMAT_ABGR16161616F,

	DRM_FORMAT_YUYV,

	DRM_FORMAT_YVYU,

	DRM_FORMAT_UYVY,

	DRM_FORMAT_VYUY,

	DRM_FORMAT_NV12,

	DRM_FORMAT_P010,

	DRM_FORMAT_P012,

	DRM_FORMAT_P016,

	DRM_FORMAT_Y210,

	DRM_FORMAT_Y212,

	DRM_FORMAT_Y216,

	DRM_FORMAT_Y410,

	DRM_FORMAT_Y412,

	DRM_FORMAT_Y416,

};



static const u64 skl_plane_format_modifiers_noccs[] = {

	I915_FORMAT_MOD_Yf_TILED,

	I915_FORMAT_MOD_Y_TILED,
@@ -2036,6 +2092,10 @@ static bool skl_plane_format_mod_supported(struct drm_plane *_plane, 
			return true;

		/* fall through */

	case DRM_FORMAT_C8:

	case DRM_FORMAT_XBGR16161616F:

	case DRM_FORMAT_ABGR16161616F:

	case DRM_FORMAT_XRGB16161616F:

	case DRM_FORMAT_ARGB16161616F:

		if (modifier == DRM_FORMAT_MOD_LINEAR ||

		    modifier == I915_FORMAT_MOD_X_TILED ||

		    modifier == I915_FORMAT_MOD_Y_TILED)
@@ -2172,7 +2232,10 @@ skl_universal_plane_create(struct drm_i915_private *dev_priv, 
		plane->update_slave = icl_update_slave;



	if (skl_plane_has_planar(dev_priv, pipe, plane_id)) {

		if (INTEL_GEN(dev_priv) >= 11) {

		if (icl_is_hdr_plane(dev_priv, plane_id)) {

			formats = icl_hdr_planar_formats;

			num_formats = ARRAY_SIZE(icl_hdr_planar_formats);

		} else if (INTEL_GEN(dev_priv) >= 11) {

			formats = icl_planar_formats;

			num_formats = ARRAY_SIZE(icl_planar_formats);

		} else if (INTEL_GEN(dev_priv) == 10 || IS_GEMINILAKE(dev_priv)) {
@@ -2182,6 +2245,9 @@ skl_universal_plane_create(struct drm_i915_private *dev_priv, 
			formats = skl_planar_formats;

			num_formats = ARRAY_SIZE(skl_planar_formats);

		}

	} else if (icl_is_hdr_plane(dev_priv, plane_id)) {

		formats = icl_hdr_plane_formats;

		num_formats = ARRAY_SIZE(icl_hdr_plane_formats);

	} else if (INTEL_GEN(dev_priv) >= 11) {

		formats = icl_plane_formats;

		num_formats = ARRAY_SIZE(icl_plane_formats);