Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit f036ebd9 authored by Jiong Wang's avatar Jiong Wang Committed by Daniel Borkmann
Browse files

nfp: bpf: fix ALU32 high bits clearance bug 



NFP BPF JIT compiler is doing a couple of small optimizations when jitting
ALU imm instructions, some of these optimizations could save code-gen, for
example:

  A & -1 =  A
  A |  0 =  A
  A ^  0 =  A

However, for ALU32, high 32-bit of the 64-bit register should still be
cleared according to ISA semantics.

Fixes: cd7df56e ("nfp: add BPF to NFP code translator")
Reviewed-by: default avatarJakub Kicinski <jakub.kicinski@netronome.com>
Signed-off-by: default avatarJiong Wang <jiong.wang@netronome.com>
Signed-off-by: default avatarDaniel Borkmann <daniel@iogearbox.net>
parent 71c19024

drivers/net/ethernet/netronome/nfp/bpf/jit.c

+6 −11
Original line number Diff line number Diff line
@@ -1291,15 +1291,10 @@ wrp_alu64_reg(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta, 


static int

wrp_alu32_imm(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta,

	      enum alu_op alu_op, bool skip)

	      enum alu_op alu_op)

{

	const struct bpf_insn *insn = &meta->insn;



	if (skip) {

		meta->skip = true;

		return 0;

	}



	wrp_alu_imm(nfp_prog, insn->dst_reg * 2, alu_op, insn->imm);

	wrp_immed(nfp_prog, reg_both(insn->dst_reg * 2 + 1), 0);
@@ -2309,7 +2304,7 @@ static int xor_reg(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 


static int xor_imm(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta)

{

	return wrp_alu32_imm(nfp_prog, meta, ALU_OP_XOR, !meta->insn.imm);

	return wrp_alu32_imm(nfp_prog, meta, ALU_OP_XOR);

}



static int and_reg(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta)
@@ -2319,7 +2314,7 @@ static int and_reg(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 


static int and_imm(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta)

{

	return wrp_alu32_imm(nfp_prog, meta, ALU_OP_AND, !~meta->insn.imm);

	return wrp_alu32_imm(nfp_prog, meta, ALU_OP_AND);

}



static int or_reg(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta)
@@ -2329,7 +2324,7 @@ static int or_reg(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 


static int or_imm(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta)

{

	return wrp_alu32_imm(nfp_prog, meta, ALU_OP_OR, !meta->insn.imm);

	return wrp_alu32_imm(nfp_prog, meta, ALU_OP_OR);

}



static int add_reg(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta)
@@ -2339,7 +2334,7 @@ static int add_reg(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 


static int add_imm(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta)

{

	return wrp_alu32_imm(nfp_prog, meta, ALU_OP_ADD, !meta->insn.imm);

	return wrp_alu32_imm(nfp_prog, meta, ALU_OP_ADD);

}



static int sub_reg(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta)
@@ -2349,7 +2344,7 @@ static int sub_reg(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 


static int sub_imm(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta)

{

	return wrp_alu32_imm(nfp_prog, meta, ALU_OP_SUB, !meta->insn.imm);

	return wrp_alu32_imm(nfp_prog, meta, ALU_OP_SUB);

}



static int mul_reg(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta)