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Commit ee0d9122 authored by Mukesh Kumar Savaliya's avatar Mukesh Kumar Savaliya Committed by Gerrit - the friendly Code Review server
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ARM: dts: msm: Add TUI support over SPI and I2C on LE VM for Yupik 

Adds SPI and I2 DTSI node support to enable Trusted VM usecase for TUI
on Yupik. Client should enable the instance and run the usecase.

Change-Id: I51b1ccc2fc7e7cc1ed4b4368d6ed06249bffa387
parent f3ff6149

qcom/yupik-qupv3.dtsi

+7 −5
Original line number Diff line number Diff line
@@ -389,10 +389,12 @@ 
			<GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>,

			<GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>,

			<GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>;

		qcom,gpii-mask = <0xff>;

		qcom,static-gpii-mask = <0x1>;

		qcom,gpii-mask = <0x7e>;

		qcom,ev-factor = <2>;

		qcom,iommu-dma-addr-pool = <0x100000 0x100000>;

		qcom,gpi-ee-offset = <0x10000>;

		qcom,le-vm;

		status = "ok";

	};
@@ -636,8 +638,8 @@ 
		pinctrl-names = "default", "sleep";

		pinctrl-0 = <&qupv3_se13_i2c_active>;

		pinctrl-1 = <&qupv3_se13_i2c_sleep>;

		dmas = <&gpi_dma1 0 5 3 64 0>,

			<&gpi_dma1 1 5 3 64 0>;

		dmas = <&gpi_dma1 0 5 3 64 2>,

			<&gpi_dma1 1 5 3 64 2>;

		dma-names = "tx", "rx";

		qcom,wrapper-core = <&qupv3_1>;

		qcom,shared;
@@ -658,8 +660,8 @@ 
		pinctrl-names = "default", "sleep";

		pinctrl-0 = <&qupv3_se13_spi_active>;

		pinctrl-1 = <&qupv3_se13_spi_sleep>;

		dmas = <&gpi_dma1 0 5 1 64 0>,

			<&gpi_dma1 1 5 1 64 0>;

		dmas = <&gpi_dma1 0 5 1 64 2>,

			<&gpi_dma1 1 5 1 64 2>;

		dma-names = "tx", "rx";

		spi-max-frequency = <50000000>;

		qcom,wrapper-core = <&qupv3_1>;

qcom/yupik-vm.dtsi

+61 −0
Original line number Diff line number Diff line
@@ -224,4 +224,65 @@ 
			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,

			     <GIC_PPI 12 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;

	};



	/* Qup3_1 SE5: se_13 */

	qupv3_1: qcom,qupv3_1_geni_se@ac0000 {

		compatible = "qcom,qupv3-geni-se";

		reg = <0xac0000 0x2000>;

		status = "ok";

	};



	/* GPI Instance */

	gpi_dma1: qcom,gpi-dma@a00000 {

		compatible = "qcom,gpi-dma";

		#dma-cells = <5>;

		reg = <0xa00000 0x60000>;

		reg-names = "gpi-top";

		qcom,max-num-gpii = <12>;

		interrupts = <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>,

			<GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>,

			<GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>,

			<GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>,

			<GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>,

			<GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>,

			<GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>,

			<GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH>,

			<GIC_SPI 295 IRQ_TYPE_LEVEL_HIGH>,

			<GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>,

			<GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>,

			<GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>;

		qcom,gpii-mask = <0x80>;

		qcom,ev-factor = <2>;

		qcom,iommu-dma-addr-pool = <0x100000 0x100000>;

		qcom,gpi-ee-offset = <0x10000>;

		status = "ok";

	};



	qupv3_se13_i2c: i2c@a94000 {

		compatible = "qcom,i2c-geni";

		reg = <0xa94000 0x4000>;

		#address-cells = <1>;

		#size-cells = <0>;

		dmas = <&gpi_dma1 0 5 3 64 2>,

			<&gpi_dma1 1 5 3 64 2>;

		dma-names = "tx", "rx";

		qcom,wrapper-core = <&qupv3_1>;

		qcom,le-vm;

		status = "disabled";

	};



	qupv3_se13_spi: spi@a94000 {

		compatible = "qcom,spi-geni";

		reg = <0xa94000 0x4000>;

		#address-cells = <1>;

		#size-cells = <0>;

		reg-names = "se_phys";

		dmas = <&gpi_dma1 0 5 1 64 2>,

			<&gpi_dma1 1 5 1 64 2>;

		dma-names = "tx", "rx";

		spi-max-frequency = <50000000>;

		qcom,wrapper-core = <&qupv3_1>;

		qcom,le-vm;

		status = "disabled";

	};

};