Loading qcom/msm-arm-smmu-sdxlemur.dtsi +6 −6 Original line number Diff line number Diff line Loading @@ -47,8 +47,8 @@ <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>; interconnects = <&system_noc MASTER_APPSS_PROC &mem_noc SLAVE_IMEM_CFG>; interconnects = <&mem_noc MASTER_APPSS_PROC &system_noc SLAVE_IMEM_CFG>; qcom,active-only; periph_tbu: periph_tbu@15045000 { Loading @@ -57,8 +57,8 @@ <0x15042200 0x8>; reg-names = "base", "status-reg"; qcom,stream-id-range = <0x0 0x400>; interconnects = <&system_noc MASTER_APPSS_PROC &mem_noc SLAVE_IMEM_CFG>; interconnects = <&mem_noc MASTER_APPSS_PROC &system_noc SLAVE_IMEM_CFG>; qcom,active-only; }; Loading @@ -68,8 +68,8 @@ <0x15042208 0x8>; reg-names = "base", "status-reg"; qcom,stream-id-range = <0x400 0x400>; interconnects = <&system_noc MASTER_APPSS_PROC &mem_noc SLAVE_IMEM_CFG>; interconnects = <&mem_noc MASTER_APPSS_PROC &system_noc SLAVE_IMEM_CFG>; qcom,active-only; }; }; Loading Loading
qcom/msm-arm-smmu-sdxlemur.dtsi +6 −6 Original line number Diff line number Diff line Loading @@ -47,8 +47,8 @@ <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>; interconnects = <&system_noc MASTER_APPSS_PROC &mem_noc SLAVE_IMEM_CFG>; interconnects = <&mem_noc MASTER_APPSS_PROC &system_noc SLAVE_IMEM_CFG>; qcom,active-only; periph_tbu: periph_tbu@15045000 { Loading @@ -57,8 +57,8 @@ <0x15042200 0x8>; reg-names = "base", "status-reg"; qcom,stream-id-range = <0x0 0x400>; interconnects = <&system_noc MASTER_APPSS_PROC &mem_noc SLAVE_IMEM_CFG>; interconnects = <&mem_noc MASTER_APPSS_PROC &system_noc SLAVE_IMEM_CFG>; qcom,active-only; }; Loading @@ -68,8 +68,8 @@ <0x15042208 0x8>; reg-names = "base", "status-reg"; qcom,stream-id-range = <0x400 0x400>; interconnects = <&system_noc MASTER_APPSS_PROC &mem_noc SLAVE_IMEM_CFG>; interconnects = <&mem_noc MASTER_APPSS_PROC &system_noc SLAVE_IMEM_CFG>; qcom,active-only; }; }; Loading