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Commit 493897f5 authored by Patrick Daly's avatar Patrick Daly
Browse files

ARM: dts: msm: Swap interconnect masters 

Correct smmu interconnect property.

Change-Id: Ifba799a82ea14e9245dae15001cb6f17c9459681
parent c443f511

qcom/msm-arm-smmu-sdxlemur.dtsi

+6 −6
Original line number Diff line number Diff line
@@ -47,8 +47,8 @@ 
				<GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,

				<GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>;



		interconnects = <&system_noc MASTER_APPSS_PROC

				 &mem_noc SLAVE_IMEM_CFG>;

		interconnects = <&mem_noc MASTER_APPSS_PROC

				 &system_noc SLAVE_IMEM_CFG>;

		qcom,active-only;



		periph_tbu: periph_tbu@15045000 {
@@ -57,8 +57,8 @@ 
				<0x15042200 0x8>;

			reg-names = "base", "status-reg";

			qcom,stream-id-range = <0x0 0x400>;

			interconnects = <&system_noc MASTER_APPSS_PROC

					 &mem_noc SLAVE_IMEM_CFG>;

			interconnects = <&mem_noc MASTER_APPSS_PROC

					 &system_noc SLAVE_IMEM_CFG>;

			qcom,active-only;

		};
@@ -68,8 +68,8 @@ 
				<0x15042208 0x8>;

			reg-names = "base", "status-reg";

			qcom,stream-id-range = <0x400 0x400>;

			interconnects = <&system_noc MASTER_APPSS_PROC

					&mem_noc SLAVE_IMEM_CFG>;

			interconnects = <&mem_noc MASTER_APPSS_PROC

					 &system_noc SLAVE_IMEM_CFG>;

			qcom,active-only;

		};

	};