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Commit eb133f0d authored by Sarthak Garg's avatar Sarthak Garg
Browse files

mmc: sdhci-msm: Use actual clock for mclk_freq calculation 



Due to SSC (Spread Spectrum) sdcc2 clock wont be 202Mhz but will be
slightly less than 202Mhz (201.99).
For yupik we are using floor ops in clock's driver to take the
floor value for the frequency passed from sdhc driver.
For 201.99Mhz clk_round_rate API will also round to the floor value leading
to 100Mhz for our mclk_freq calculation.

Instead of clk_round_rate and dividing by two logic we can directly
use actual clock which will be supplied to the card in mclk_freq
calculation.

Change-Id: I57a864b98d85573eb9038b6d6f502f83850eed73
Signed-off-by: default avatarSarthak Garg <sartgarg@codeaurora.org>
parent 76d7b8f1

drivers/mmc/host/sdhci-msm.c

+1 −25
Original line number Diff line number Diff line
@@ -475,9 +475,6 @@ static void sdhci_msm_bus_voting(struct sdhci_host *host, bool enable); 
static int sdhci_msm_dt_get_array(struct device *dev, const char *prop_name,

				u32 **bw_vecs, int *len, u32 size);



static unsigned int sdhci_msm_get_sup_clk_rate(struct sdhci_host *host,

				u32 req_clk);



static const struct sdhci_msm_offset *sdhci_priv_msm_offset(struct sdhci_host *host)

{

	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
@@ -835,7 +832,7 @@ static int msm_init_cm_dll(struct sdhci_host *host, 
	const struct sdhci_msm_offset *msm_offset =

					msm_host->offset;



	dll_clock = sdhci_msm_get_sup_clk_rate(host, host->clock);

	dll_clock = mmc->actual_clock;

	spin_lock_irqsave(&host->lock, flags);



	core_vendor_spec = readl_relaxed(host->ioaddr +
@@ -2452,27 +2449,6 @@ static unsigned int sdhci_msm_get_min_clock(struct sdhci_host *host) 
	return SDHCI_MSM_MIN_CLOCK;

}



static unsigned int sdhci_msm_get_sup_clk_rate(struct sdhci_host *host,

						u32 req_clk)

{

	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);

	struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host);

	struct clk *core_clk = msm_host->bulk_clks[0].clk;

	unsigned int sup_clk = -1;



	if (req_clk < sdhci_msm_get_min_clock(host)) {

		sup_clk = sdhci_msm_get_min_clock(host);

		return sup_clk;

	}



	sup_clk = clk_round_rate(core_clk, clk_get_rate(core_clk));



	if (host->clock != msm_host->clk_rate)

		sup_clk = sup_clk / 2;



	return sup_clk;

}



/**

 * __sdhci_msm_set_clock - sdhci_msm clock control.

 *