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Commit ea0f09d6 authored by Elliot Berman's avatar Elliot Berman
Browse files

firmware: qcom_scm-64: Improve SMC convention detection 



Improve the calling convention detection to use qcom_scm_call_atomic
and not blindly assume 32-bit mode if the checks fails.

__qcom_scm_is_call_available() cannot be used directly here as we want
an atomic variant of is_call_available(). This is also a necessary
requirement later when merging in legacy convention.

Change-Id: I66beec550d05afde6c680d256183e8ad207d7268
Signed-off-by: default avatarElliot Berman <eberman@codeaurora.org>
parent 6b998399

drivers/firmware/qcom_scm-64.c

+22 −13
Original line number Diff line number Diff line
@@ -582,20 +582,29 @@ int __qcom_scm_qsmmu500_wait_safe_toggle(struct device *dev, bool en) 


void __qcom_scm_init(void)

{

	u64 cmd;

	struct arm_smccc_res res;

	u32 function = SMCCC_FUNCNUM(QCOM_SCM_SVC_INFO,

				     QCOM_SCM_INFO_IS_CALL_AVAIL);

	int ret;

	struct qcom_scm_desc desc = {

		.svc = QCOM_SCM_SVC_INFO,

		.cmd = QCOM_SCM_INFO_IS_CALL_AVAIL,

		.args[1] = SMCCC_FUNCNUM(QCOM_SCM_SVC_INFO,

					 QCOM_SCM_INFO_IS_CALL_AVAIL) |

			   (ARM_SMCCC_OWNER_SIP << ARM_SMCCC_OWNER_SHIFT),

		.arginfo = QCOM_SCM_ARGS(1);

		.owner = ARM_SMCCC_OWNER_SIP,

	};



	/* First try a SMC64 call */

	cmd = ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, ARM_SMCCC_SMC_64,

				 ARM_SMCCC_OWNER_SIP, function);

	qcom_smcc_convention = ARM_SMCCC_SMC_64;

	ret = qcom_scm_call_atomic(NULL, &desc);

	if (!ret && desc.res[0] == 1)

		goto out;



	arm_smccc_smc(cmd, QCOM_SCM_ARGS(1), cmd & (~BIT(ARM_SMCCC_TYPE_SHIFT)),

		      0, 0, 0, 0, 0, &res);

	qcom_smcc_convention = ARM_SMCCC_SMC_32;

	ret = qcom_scm_call_atomic(NULL, &desc);

	if (!ret && desc.res[0] == 1)

		goto out;



	if (!res.a0 && res.a1)

		qcom_smccc_convention = ARM_SMCCC_SMC_64;

	else

		qcom_smccc_convention = ARM_SMCCC_SMC_32;

	qcom_smccc_convention = -1;

	BUG();

out:

	pr_debug("QCOM SCM SMC Convention: %d\n", qcom_smcc_convention);

}