serial: msm_geni_serial: Add delay for rx invalid transfer

Check for RX data in rx buffer for faulty transfer and add
delay of 2 msecs delay in order for dma rx transfer
to be actually completed.

Also dump required qup registers when the uart dma rx data is
seen as all zeros.

Change-Id: Ifaa0cb7d22b8419ffacfee7212b0a28ed8ebf2a1
Signed-off-by: Chandana Kishori Chiluveru <cchiluve@codeaurora.org>