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Commit da090917 authored by Tomer Tayar's avatar Tomer Tayar Committed by David S. Miller
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qed*: Utilize FW 8.33.1.0



Advance the qed* drivers to use firmware 8.33.1.0:
Modify core driver (qed) to utilize the new FW and initialize the device
with it. This is the lion's share of the patch, and includes changes to FW
interface files, device initialization flows, FW interaction flows, and
debug collection flows.
Modify Ethernet driver (qede) to make use of new FW in fastpath.
Modify RoCE/iWARP driver (qedr) to make use of new FW in fastpath.
Modify FCoE driver (qedf) to make use of new FW in fastpath.
Modify iSCSI driver (qedi) to make use of new FW in fastpath.

Signed-off-by: default avatarAriel Elior <Ariel.Elior@cavium.com>
Signed-off-by: default avatarMichal Kalderon <Michal.Kalderon@cavium.com>
Signed-off-by: default avatarYuval Bason <Yuval.Bason@cavium.com>
Signed-off-by: default avatarRam Amrani <Ram.Amrani@cavium.com>
Signed-off-by: default avatarManish Chopra <Manish.Chopra@cavium.com>
Signed-off-by: default avatarChad Dupuis <Chad.Dupuis@cavium.com>
Signed-off-by: default avatarManish Rangankar <Manish.Rangankar@cavium.com>
Signed-off-by: default avatarTomer Tayar <Tomer.Tayar@cavium.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 21dd79e8
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+25 −8
Original line number Diff line number Diff line
@@ -164,6 +164,13 @@ struct rdma_srq_sge {
	__le32 l_key;
};

/* Rdma doorbell data for flags update */
struct rdma_pwm_flags_data {
	__le16 icid; /* internal CID */
	u8 agg_flags; /* aggregative flags */
	u8 reserved;
};

/* Rdma doorbell data for SQ and RQ */
struct rdma_pwm_val16_data {
	__le16 icid;
@@ -184,8 +191,12 @@ struct rdma_pwm_val32_data {
#define RDMA_PWM_VAL32_DATA_AGG_CMD_SHIFT		0
#define RDMA_PWM_VAL32_DATA_BYPASS_EN_MASK		0x1
#define RDMA_PWM_VAL32_DATA_BYPASS_EN_SHIFT		2
#define RDMA_PWM_VAL32_DATA_RESERVED_MASK		0x1F
#define RDMA_PWM_VAL32_DATA_RESERVED_SHIFT		3
#define RDMA_PWM_VAL32_DATA_CONN_TYPE_IS_IWARP_MASK	0x1
#define RDMA_PWM_VAL32_DATA_CONN_TYPE_IS_IWARP_SHIFT	3
#define RDMA_PWM_VAL32_DATA_SET_16B_VAL_MASK		0x1
#define RDMA_PWM_VAL32_DATA_SET_16B_VAL_SHIFT		4
#define RDMA_PWM_VAL32_DATA_RESERVED_MASK		0x7
#define RDMA_PWM_VAL32_DATA_RESERVED_SHIFT		5
	__le32 value;
};

@@ -492,8 +503,10 @@ struct rdma_sq_fmr_wqe {
#define RDMA_SQ_FMR_WQE_DIF_VALIDATE_APP_TAG_SHIFT	5
#define RDMA_SQ_FMR_WQE_DIF_CRC_SEED_MASK		0x1
#define RDMA_SQ_FMR_WQE_DIF_CRC_SEED_SHIFT		6
#define RDMA_SQ_FMR_WQE_RESERVED4_MASK			0x1FF
#define RDMA_SQ_FMR_WQE_RESERVED4_SHIFT			7
#define RDMA_SQ_FMR_WQE_DIF_RX_REF_TAG_CONST_MASK	0x1
#define RDMA_SQ_FMR_WQE_DIF_RX_REF_TAG_CONST_SHIFT	7
#define RDMA_SQ_FMR_WQE_RESERVED4_MASK			0xFF
#define RDMA_SQ_FMR_WQE_RESERVED4_SHIFT			8
	__le32 reserved5;
};

@@ -572,8 +585,10 @@ struct rdma_sq_fmr_wqe_3rd {
#define RDMA_SQ_FMR_WQE_3RD_DIF_VALIDATE_APP_TAG_SHIFT		5
#define RDMA_SQ_FMR_WQE_3RD_DIF_CRC_SEED_MASK			0x1
#define RDMA_SQ_FMR_WQE_3RD_DIF_CRC_SEED_SHIFT			6
#define RDMA_SQ_FMR_WQE_3RD_RESERVED4_MASK			0x1FF
#define RDMA_SQ_FMR_WQE_3RD_RESERVED4_SHIFT			7
#define RDMA_SQ_FMR_WQE_3RD_DIF_RX_REF_TAG_CONST_MASK		0x1
#define RDMA_SQ_FMR_WQE_3RD_DIF_RX_REF_TAG_CONST_SHIFT		7
#define RDMA_SQ_FMR_WQE_3RD_RESERVED4_MASK			0xFF
#define RDMA_SQ_FMR_WQE_RESERVED4_SHIFT				8
	__le32 reserved5;
};

@@ -618,8 +633,10 @@ struct rdma_sq_rdma_wqe {
#define RDMA_SQ_RDMA_WQE_INLINE_FLG_SHIFT	4
#define RDMA_SQ_RDMA_WQE_DIF_ON_HOST_FLG_MASK	0x1
#define RDMA_SQ_RDMA_WQE_DIF_ON_HOST_FLG_SHIFT	5
#define RDMA_SQ_RDMA_WQE_RESERVED0_MASK		0x3
#define RDMA_SQ_RDMA_WQE_RESERVED0_SHIFT	6
#define RDMA_SQ_RDMA_WQE_READ_INV_FLG_MASK	0x1
#define RDMA_SQ_RDMA_WQE_READ_INV_FLG_SHIFT	6
#define RDMA_SQ_RDMA_WQE_RESERVED0_MASK		0x1
#define RDMA_SQ_RDMA_WQE_RESERVED0_SHIFT	7
	u8 wqe_size;
	u8 prev_wqe_size;
	struct regpair remote_va;
+1 −0
Original line number Diff line number Diff line
@@ -85,6 +85,7 @@ config QED
	tristate "QLogic QED 25/40/100Gb core driver"
	depends on PCI
	select ZLIB_INFLATE
	select CRC8
	---help---
	  This enables the support for ...

+1 −1
Original line number Diff line number Diff line
@@ -778,8 +778,8 @@ static inline u8 qed_concrete_to_sw_fid(struct qed_dev *cdev,
	return sw_fid;
}

#define PURE_LB_TC 8
#define PKT_LB_TC	9
#define MAX_NUM_VOQS_E4	20

int qed_configure_vport_wfq(struct qed_dev *cdev, u16 vp_id, u32 rate);
void qed_configure_vp_wfq_on_link_change(struct qed_dev *cdev,
+10 −5
Original line number Diff line number Diff line
@@ -742,7 +742,7 @@ int qed_cxt_cfg_ilt_compute(struct qed_hwfn *p_hwfn, u32 *line_count)
	p_blk = qed_cxt_set_blk(&p_cli->pf_blks[0]);

	qed_cxt_qm_iids(p_hwfn, &qm_iids);
	total = qed_qm_pf_mem_size(p_hwfn->rel_pf_id, qm_iids.cids,
	total = qed_qm_pf_mem_size(qm_iids.cids,
				   qm_iids.vf_cids, qm_iids.tids,
				   p_hwfn->qm_info.num_pqs,
				   p_hwfn->qm_info.num_vf_pqs);
@@ -1496,20 +1496,24 @@ static void qed_cdu_init_pf(struct qed_hwfn *p_hwfn)
	}
}

void qed_qm_init_pf(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
void qed_qm_init_pf(struct qed_hwfn *p_hwfn,
		    struct qed_ptt *p_ptt, bool is_pf_loading)
{
	struct qed_qm_pf_rt_init_params params;
	struct qed_qm_info *qm_info = &p_hwfn->qm_info;
	struct qed_qm_pf_rt_init_params params;
	struct qed_mcp_link_state *p_link;
	struct qed_qm_iids iids;

	memset(&iids, 0, sizeof(iids));
	qed_cxt_qm_iids(p_hwfn, &iids);

	p_link = &QED_LEADING_HWFN(p_hwfn->cdev)->mcp_info->link_output;

	memset(&params, 0, sizeof(params));
	params.port_id = p_hwfn->port_id;
	params.pf_id = p_hwfn->rel_pf_id;
	params.max_phys_tcs_per_port = qm_info->max_phys_tcs_per_port;
	params.is_first_pf = p_hwfn->first_on_engine;
	params.is_pf_loading = is_pf_loading;
	params.num_pf_cids = iids.cids;
	params.num_vf_cids = iids.vf_cids;
	params.num_tids = iids.tids;
@@ -1520,6 +1524,7 @@ void qed_qm_init_pf(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
	params.num_vports = qm_info->num_vports;
	params.pf_wfq = qm_info->pf_wfq;
	params.pf_rl = qm_info->pf_rl;
	params.link_speed = p_link->speed;
	params.pq_params = qm_info->qm_pq_params;
	params.vport_params = qm_info->qm_vport_params;

@@ -1883,7 +1888,7 @@ void qed_cxt_hw_init_common(struct qed_hwfn *p_hwfn)

void qed_cxt_hw_init_pf(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
{
	qed_qm_init_pf(p_hwfn, p_ptt);
	qed_qm_init_pf(p_hwfn, p_ptt, true);
	qed_cm_init_pf(p_hwfn);
	qed_dq_init_pf(p_hwfn);
	qed_cdu_init_pf(p_hwfn);
+3 −1
Original line number Diff line number Diff line
@@ -169,8 +169,10 @@ void qed_cxt_hw_init_pf(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
 *
 * @param p_hwfn
 * @param p_ptt
 * @param is_pf_loading
 */
void qed_qm_init_pf(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
void qed_qm_init_pf(struct qed_hwfn *p_hwfn,
		    struct qed_ptt *p_ptt, bool is_pf_loading);

/**
 * @brief Reconfigures QM pf on the fly
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