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Commit d9862cfb authored by Linus Torvalds's avatar Linus Torvalds
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Pull MIPS updates from Paul Burton:

 - Support for the MIPSr6 MemoryMapID register & Global INValidate TLB
   (GINVT) instructions, allowing for more efficient TLB maintenance
   when running on a CPU such as the I6500 that supports these.

 - Enable huge page support for MIPS64r6.

 - Optimize post-DMA cache sync by removing that code entirely for
   kernel configurations in which we know it won't be needed.

 - The number of pages allocated for interrupt stacks is now calculated
   correctly, where before we would wastefully allocate too much memory
   in some configurations.

 - The ath79 platform migrates to devicetree.

 - The bcm47xx platform sees fixes for the Buffalo WHR-G54S board.

 - The ingenic/jz4740 platform gains support for appended devicetrees.

 - The cavium_octeon, lantiq, loongson32 & sgi-ip27 platforms all see
   cleanups as do various pieces of core architecture code.

* tag 'mips_5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (66 commits)
  MIPS: lantiq: Remove separate GPHY Firmware loader
  MIPS: ingenic: Add support for appended devicetree
  MIPS: SGI-IP27: rework HUB interrupts
  MIPS: SGI-IP27: do boot CPU init later
  MIPS: SGI-IP27: do xtalk scanning later
  MIPS: SGI-IP27: use pr_info/pr_emerg and pr_cont to fix output
  MIPS: SGI-IP27: clean up bridge access and header files
  MIPS: SGI-IP27: get rid of volatile and hubreg_t
  MIPS: irq: Allocate accurate order pages for irq stack
  MIPS: dma-noncoherent: Remove bogus condition in dma_sync_phys()
  MIPS: eBPF: Remove REG_32BIT_ZERO_EX
  MIPS: eBPF: Always return sign extended 32b values
  MIPS: CM: Fix indentation
  MIPS: BCM47XX: Fix/improve Buffalo WHR-G54S support
  MIPS: OCTEON: program rx/tx-delay always from DT
  MIPS: OCTEON: delete board-specific link status
  MIPS: OCTEON: don't lie about interface type of CN3005 board
  MIPS: OCTEON: warn if deprecated link status is being used
  MIPS: OCTEON: add fixed-link nodes to in-kernel device tree
  MIPS: Delete unused flush_cache_sigtramp()
  ...
parents 8feed3ef aeb669d4
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+0 −36
Original line number Diff line number Diff line
Lantiq XWAY SoC GPHY binding
============================

This binding describes a software-defined ethernet PHY, provided by the RCU
module on newer Lantiq XWAY SoCs (xRX200 and newer).

-------------------------------------------------------------------------------
Required properties:
- compatible		: Should be one of
				"lantiq,xrx200a1x-gphy"
				"lantiq,xrx200a2x-gphy"
				"lantiq,xrx300-gphy"
				"lantiq,xrx330-gphy"
- reg			: Addrress of the GPHY FW load address register
- resets		: Must reference the RCU GPHY reset bit
- reset-names		: One entry, value must be "gphy" or optional "gphy2"
- clocks		: A reference to the (PMU) GPHY clock gate

Optional properties:
- lantiq,gphy-mode	: GPHY_MODE_GE (default) or GPHY_MODE_FE as defined in
			  <dt-bindings/mips/lantiq_xway_gphy.h>


-------------------------------------------------------------------------------
Example for the GPHys on the xRX200 SoCs:

#include <dt-bindings/mips/lantiq_rcu_gphy.h>
	gphy0: gphy@20 {
		compatible = "lantiq,xrx200a2x-gphy";
		reg = <0x20 0x4>;

		resets = <&reset0 31 30>, <&reset1 7 7>;
		reset-names = "gphy", "gphy2";
		clocks = <&pmu0 XRX200_PMU_GATE_GPHY>;
		lantiq,gphy-mode = <GPHY_MODE_GE>;
	};
+0 −18
Original line number Diff line number Diff line
@@ -26,24 +26,6 @@ Example of the RCU bindings on a xRX200 SoC:
		ranges = <0x0 0x203000 0x100>;
		big-endian;

		gphy0: gphy@20 {
			compatible = "lantiq,xrx200a2x-gphy";
			reg = <0x20 0x4>;

			resets = <&reset0 31 30>, <&reset1 7 7>;
			reset-names = "gphy", "gphy2";
			lantiq,gphy-mode = <GPHY_MODE_GE>;
		};

		gphy1: gphy@68 {
			compatible = "lantiq,xrx200a2x-gphy";
			reg = <0x68 0x4>;

			resets = <&reset0 29 28>, <&reset1 6 6>;
			reset-names = "gphy", "gphy2";
			lantiq,gphy-mode = <GPHY_MODE_GE>;
		};

		reset0: reset-controller@10 {
			compatible = "lantiq,xrx200-reset";
			reg = <0x10 4>, <0x14 4>;
+9 −4
Original line number Diff line number Diff line
@@ -206,7 +206,6 @@ config ATH79
	select COMMON_CLK
	select CLKDEV_LOOKUP
	select IRQ_MIPS_CPU
	select MIPS_MACHINE
	select SYS_HAS_CPU_MIPS32_R2
	select SYS_HAS_EARLY_PRINTK
	select SYS_SUPPORTS_32BIT_KERNEL
@@ -391,7 +390,7 @@ config MACH_INGENIC
	select GPIOLIB
	select COMMON_CLK
	select GENERIC_IRQ_CHIP
	select BUILTIN_DTB
	select BUILTIN_DTB if MIPS_NO_APPENDED_DTB
	select USE_OF
	select LIBFDT

@@ -676,6 +675,7 @@ config SGI_IP27
	select DEFAULT_SGI_PARTITION
	select SYS_HAS_EARLY_PRINTK
	select HAVE_PCI
	select IRQ_MIPS_CPU
	select NR_CPUS_DEFAULT_64
	select SYS_HAS_CPU_R10000
	select SYS_SUPPORTS_64BIT_KERNEL
@@ -1124,7 +1124,6 @@ config DMA_NONCOHERENT
	bool
	select ARCH_HAS_DMA_MMAP_PGPROT
	select ARCH_HAS_SYNC_DMA_FOR_DEVICE
	select ARCH_HAS_SYNC_DMA_FOR_CPU
	select NEED_DMA_MAP_STATE
	select ARCH_HAS_DMA_COHERENT_TO_PFN
	select DMA_NONCOHERENT_CACHE_SYNC
@@ -1556,6 +1555,7 @@ config CPU_MIPS64_R6
	select CPU_SUPPORTS_32BIT_KERNEL
	select CPU_SUPPORTS_64BIT_KERNEL
	select CPU_SUPPORTS_HIGHMEM
	select CPU_SUPPORTS_HUGEPAGES
	select CPU_SUPPORTS_MSA
	select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
	select HAVE_KVM
@@ -1881,7 +1881,7 @@ config CPU_LOONGSON2
config CPU_LOONGSON1
	bool
	select CPU_MIPS32
	select CPU_MIPSR1
	select CPU_MIPSR2
	select CPU_HAS_PREFETCH
	select CPU_HAS_LOAD_STORE_LR
	select CPU_SUPPORTS_32BIT_KERNEL
@@ -1943,9 +1943,11 @@ config SYS_HAS_CPU_MIPS32_R3_5

config SYS_HAS_CPU_MIPS32_R5
	bool
	select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT

config SYS_HAS_CPU_MIPS32_R6
	bool
	select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT

config SYS_HAS_CPU_MIPS64_R1
	bool
@@ -1955,6 +1957,7 @@ config SYS_HAS_CPU_MIPS64_R2

config SYS_HAS_CPU_MIPS64_R6
	bool
	select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT

config SYS_HAS_CPU_R3000
	bool
@@ -1991,6 +1994,7 @@ config SYS_HAS_CPU_R8000

config SYS_HAS_CPU_R10000
	bool
	select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT

config SYS_HAS_CPU_RM7000
	bool
@@ -2019,6 +2023,7 @@ config SYS_HAS_CPU_BMIPS4380
config SYS_HAS_CPU_BMIPS5000
	bool
	select SYS_HAS_CPU_BMIPS
	select ARCH_HAS_SYNC_DMA_FOR_CPU

config SYS_HAS_CPU_XLR
	bool
+2 −0
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@@ -233,6 +233,8 @@ toolchain-crc := $(call cc-option-yn,$(mips-cflags) -Wa$(comma)-mcrc)
cflags-$(toolchain-crc)			+= -DTOOLCHAIN_SUPPORTS_CRC
toolchain-dsp				:= $(call cc-option-yn,$(mips-cflags) -Wa$(comma)-mdsp)
cflags-$(toolchain-dsp)			+= -DTOOLCHAIN_SUPPORTS_DSP
toolchain-ginv				:= $(call cc-option-yn,$(mips-cflags) -Wa$(comma)-mginv)
cflags-$(toolchain-ginv)		+= -DTOOLCHAIN_SUPPORTS_GINV

#
# Firmware support
+0 −73
Original line number Diff line number Diff line
# SPDX-License-Identifier: GPL-2.0
if ATH79

menu "Atheros AR71XX/AR724X/AR913X machine selection"

config ATH79_MACH_AP121
	bool "Atheros AP121 reference board"
	select SOC_AR933X
	select ATH79_DEV_GPIO_BUTTONS
	select ATH79_DEV_LEDS_GPIO
	select ATH79_DEV_SPI
	select ATH79_DEV_USB
	select ATH79_DEV_WMAC
	help
	  Say 'Y' here if you want your kernel to support the
	  Atheros AP121 reference board.

config ATH79_MACH_AP136
	bool "Atheros AP136 reference board"
	select SOC_QCA955X
	select ATH79_DEV_GPIO_BUTTONS
	select ATH79_DEV_LEDS_GPIO
	select ATH79_DEV_SPI
	select ATH79_DEV_USB
	select ATH79_DEV_WMAC
	help
	  Say 'Y' here if you want your kernel to support the
	  Atheros AP136 reference board.

config ATH79_MACH_AP81
	bool "Atheros AP81 reference board"
	select SOC_AR913X
	select ATH79_DEV_GPIO_BUTTONS
	select ATH79_DEV_LEDS_GPIO
	select ATH79_DEV_SPI
	select ATH79_DEV_USB
	select ATH79_DEV_WMAC
	help
	  Say 'Y' here if you want your kernel to support the
	  Atheros AP81 reference board.

config ATH79_MACH_DB120
	bool "Atheros DB120 reference board"
	select SOC_AR934X
	select ATH79_DEV_GPIO_BUTTONS
	select ATH79_DEV_LEDS_GPIO
	select ATH79_DEV_SPI
	select ATH79_DEV_USB
	select ATH79_DEV_WMAC
	help
	  Say 'Y' here if you want your kernel to support the
	  Atheros DB120 reference board.

config ATH79_MACH_PB44
	bool "Atheros PB44 reference board"
	select SOC_AR71XX
	select ATH79_DEV_GPIO_BUTTONS
	select ATH79_DEV_LEDS_GPIO
	select ATH79_DEV_SPI
	select ATH79_DEV_USB
	help
	  Say 'Y' here if you want your kernel to support the
	  Atheros PB44 reference board.

config ATH79_MACH_UBNT_XM
	bool "Ubiquiti Networks XM (rev 1.0) board"
	select SOC_AR724X
	select ATH79_DEV_GPIO_BUTTONS
	select ATH79_DEV_LEDS_GPIO
	select ATH79_DEV_SPI
	help
	  Say 'Y' here if you want your kernel to support the
	  Ubiquiti Networks XM (rev 1.0) board.

endmenu

config SOC_AR71XX
	select HAVE_PCI
	def_bool n
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