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Unverified Commit aeb669d4 authored by Hauke Mehrtens's avatar Hauke Mehrtens Committed by Paul Burton
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MIPS: lantiq: Remove separate GPHY Firmware loader 



The separate GPHY Firmware loader driver is not used any more, the GPHY
firmware is now loaded by the GSWIP switch driver which also makes use
of the GPHY.
Remove the old unused GPHY firmware loader driver.

The GPHY firmware is useless without an Ethernet and switch driver, it
should not harm if loading this does not work for system using an old
device tree.
I am not aware of any vendor separating the device tree from the kernel
binary, it should be ok to remove this.

The code and the functionality form this separate GPHY firmware loader
was added to the gswip driver in commit 14fceff4 ("net: dsa: Add
Lantiq / Intel DSA driver for vrx200")

Signed-off-by: default avatarHauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: default avatarPaul Burton <paul.burton@mips.com>
Cc: linux-mips@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: john@phrozen.org
Cc: netdev@vger.kernel.org
parent 15205fc0

Documentation/devicetree/bindings/mips/lantiq/rcu-gphy.txt

deleted100644 → 0
+0 −36
Original line number Diff line number Diff line 
Lantiq XWAY SoC GPHY binding

============================



This binding describes a software-defined ethernet PHY, provided by the RCU

module on newer Lantiq XWAY SoCs (xRX200 and newer).



-------------------------------------------------------------------------------

Required properties:

- compatible		: Should be one of

				"lantiq,xrx200a1x-gphy"

				"lantiq,xrx200a2x-gphy"

				"lantiq,xrx300-gphy"

				"lantiq,xrx330-gphy"

- reg			: Addrress of the GPHY FW load address register

- resets		: Must reference the RCU GPHY reset bit

- reset-names		: One entry, value must be "gphy" or optional "gphy2"

- clocks		: A reference to the (PMU) GPHY clock gate



Optional properties:

- lantiq,gphy-mode	: GPHY_MODE_GE (default) or GPHY_MODE_FE as defined in

			  <dt-bindings/mips/lantiq_xway_gphy.h>





-------------------------------------------------------------------------------

Example for the GPHys on the xRX200 SoCs:



#include <dt-bindings/mips/lantiq_rcu_gphy.h>

	gphy0: gphy@20 {

		compatible = "lantiq,xrx200a2x-gphy";

		reg = <0x20 0x4>;



		resets = <&reset0 31 30>, <&reset1 7 7>;

		reset-names = "gphy", "gphy2";

		clocks = <&pmu0 XRX200_PMU_GATE_GPHY>;

		lantiq,gphy-mode = <GPHY_MODE_GE>;

	};

Documentation/devicetree/bindings/mips/lantiq/rcu.txt

+0 −18
Original line number Diff line number Diff line
@@ -26,24 +26,6 @@ Example of the RCU bindings on a xRX200 SoC: 
		ranges = <0x0 0x203000 0x100>;

		big-endian;



		gphy0: gphy@20 {

			compatible = "lantiq,xrx200a2x-gphy";

			reg = <0x20 0x4>;



			resets = <&reset0 31 30>, <&reset1 7 7>;

			reset-names = "gphy", "gphy2";

			lantiq,gphy-mode = <GPHY_MODE_GE>;

		};



		gphy1: gphy@68 {

			compatible = "lantiq,xrx200a2x-gphy";

			reg = <0x68 0x4>;



			resets = <&reset0 29 28>, <&reset1 6 6>;

			reset-names = "gphy", "gphy2";

			lantiq,gphy-mode = <GPHY_MODE_GE>;

		};



		reset0: reset-controller@10 {

			compatible = "lantiq,xrx200-reset";

			reg = <0x10 4>, <0x14 4>;

arch/mips/configs/xway_defconfig

+0 −1
Original line number Diff line number Diff line
@@ -13,7 +13,6 @@ CONFIG_EMBEDDED=y 
# CONFIG_COMPAT_BRK is not set

CONFIG_LANTIQ=y

CONFIG_PCI_LANTIQ=y

CONFIG_XRX200_PHY_FW=y

CONFIG_CPU_MIPS32_R2=y

CONFIG_MIPS_VPE_LOADER=y

CONFIG_NR_CPUS=2

arch/mips/lantiq/Kconfig

+0 −4
Original line number Diff line number Diff line
@@ -52,8 +52,4 @@ config PCI_LANTIQ 
	bool "PCI Support"

	depends on SOC_XWAY && PCI



config XRX200_PHY_FW

	bool "XRX200 PHY firmware loader"

	depends on SOC_XWAY



endif

drivers/soc/lantiq/Makefile

+0 −1
Original line number Diff line number Diff line 
obj-y				+= fpi-bus.o
 
obj-$(CONFIG_XRX200_PHY_FW)	+= gphy.o