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Commit d6821186 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "asoc: Set clock index correctly in mi2s slave mode"

parents c77b8aac 1e417536

asoc/bengal.c

+5 −4
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0-only

/*

 * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.

 * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.

 */



#include <linux/clk.h>
@@ -3956,6 +3957,9 @@ static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream) 
	 */

	mutex_lock(&mi2s_intf_conf[index].lock);

	if (++mi2s_intf_conf[index].ref_cnt == 1) {

		/* Check if msm needs to provide the clock to the interface */

		if (!mi2s_intf_conf[index].msm_is_mi2s_master)

			mi2s_clk[index].clk_id = mi2s_ebit_clk[index];

		ret = msm_mi2s_set_sclk(substream, true);

		if (ret < 0) {

			dev_err(rtd->card->dev,
@@ -3978,11 +3982,8 @@ static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream) 
			atomic_inc(&(pdata->mi2s_gpio_ref_count[index]));

		}

	}

	/* Check if msm needs to provide the clock to the interface */

	if (!mi2s_intf_conf[index].msm_is_mi2s_master) {

		mi2s_clk[index].clk_id = mi2s_ebit_clk[index];

	if (!mi2s_intf_conf[index].msm_is_mi2s_master)

		fmt = SND_SOC_DAIFMT_CBM_CFM;

	}

	ret = snd_soc_dai_set_fmt(cpu_dai, fmt);

	if (ret < 0) {

		pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",

asoc/holi.c

+5 −4
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0-only

/*

 * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.

 * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.

 */



#include <linux/clk.h>
@@ -4459,6 +4460,9 @@ static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream) 
	}



	if (++mi2s_intf_conf[index].ref_cnt == 1) {

		/* Check if msm needs to provide the clock to the interface */

		if (!mi2s_intf_conf[index].msm_is_mi2s_master)

			mi2s_clk[index].clk_id = mi2s_ebit_clk[index];

		ret = msm_mi2s_set_sclk(substream, true);

		if (ret < 0) {

			dev_err(rtd->card->dev,
@@ -4481,11 +4485,8 @@ static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream) 
			atomic_inc(&(pdata->mi2s_gpio_ref_count[index]));

		}

	}

	/* Check if msm needs to provide the clock to the interface */

	if (!mi2s_intf_conf[index].msm_is_mi2s_master) {

		mi2s_clk[index].clk_id = mi2s_ebit_clk[index];

	if (!mi2s_intf_conf[index].msm_is_mi2s_master)

		fmt = SND_SOC_DAIFMT_CBM_CFM;

	}

	ret = snd_soc_dai_set_fmt(cpu_dai, fmt);

	if (ret < 0) {

		pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",

asoc/kona.c

+5 −4
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0-only

/*

 * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.

 * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.

 */



#include <linux/clk.h>
@@ -5100,6 +5101,9 @@ static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream) 
	}



	if (++mi2s_intf_conf[index].ref_cnt == 1) {

		/* Check if msm needs to provide the clock to the interface */

		if (!mi2s_intf_conf[index].msm_is_mi2s_master)

			mi2s_clk[index].clk_id = mi2s_ebit_clk[index];

		ret = msm_mi2s_set_sclk(substream, true);

		if (ret < 0) {

			dev_err(rtd->card->dev,
@@ -5122,11 +5126,8 @@ static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream) 
			atomic_inc(&(pdata->mi2s_gpio_ref_count[index]));

		}

	}

	/* Check if msm needs to provide the clock to the interface */

	if (!mi2s_intf_conf[index].msm_is_mi2s_master) {

		mi2s_clk[index].clk_id = mi2s_ebit_clk[index];

	if (!mi2s_intf_conf[index].msm_is_mi2s_master)

		fmt = SND_SOC_DAIFMT_CBM_CFM;

	}

	ret = snd_soc_dai_set_fmt(cpu_dai, fmt);

	if (ret < 0) {

		pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",

asoc/lahaina.c

+5 −4
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0-only

/*

 * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.

 * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.

 */



#include <linux/clk.h>
@@ -5440,6 +5441,9 @@ static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream) 
		dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,

			mi2s_clk[index].clk_freq_in_hz);



		/* Check if msm needs to provide the clock to the interface */

		if (!mi2s_intf_conf[index].msm_is_mi2s_master)

			mi2s_clk[index].clk_id = mi2s_ebit_clk[index];

		ret = msm_mi2s_set_sclk(substream, true);

		if (ret < 0) {

			dev_err(rtd->card->dev,
@@ -5462,11 +5466,8 @@ static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream) 
			atomic_inc(&(pdata->mi2s_gpio_ref_count[index]));

		}

	}

	/* Check if msm needs to provide the clock to the interface */

	if (!mi2s_intf_conf[index].msm_is_mi2s_master) {

		mi2s_clk[index].clk_id = mi2s_ebit_clk[index];

	if (!mi2s_intf_conf[index].msm_is_mi2s_master)

		fmt = SND_SOC_DAIFMT_CBM_CFM;

	}

	ret = snd_soc_dai_set_fmt(cpu_dai, fmt);

	if (ret < 0) {

		pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",

asoc/qcs405.c

+5 −4
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0-only

/* Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.

 * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.

 */

#include <linux/clk.h>

#include <linux/delay.h>
@@ -7065,6 +7066,9 @@ static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream) 
	if (++mi2s_intf_conf[index].ref_cnt == 1) {

		if (data_format == AFE_DSD_DATA)

			fmt = SND_SOC_DAIFMT_CBM_CFS;

		/* Check if msm needs to provide the clock to the interface */

		if (!mi2s_intf_conf[index].msm_is_mi2s_master)

			mi2s_clk[index].clk_id = mi2s_ebit_clk[index];

		ret = msm_mi2s_set_sclk(substream, true);

		if (ret < 0) {

			dev_err(rtd->card->dev,
@@ -7101,11 +7105,8 @@ static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream) 
			}

		}

	}

	/* Check if msm needs to provide the clock to the interface */

	if (!mi2s_intf_conf[index].msm_is_mi2s_master) {

		mi2s_clk[index].clk_id = mi2s_ebit_clk[index];

	if (!mi2s_intf_conf[index].msm_is_mi2s_master)

		fmt = SND_SOC_DAIFMT_CBM_CFM;

	}

	ret = snd_soc_dai_set_fmt(cpu_dai, fmt);

	if (ret < 0) {

		pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",