ARM: dts: msm: delay backlight update until first frame on Blair

If a DSI DMA command is triggered after enabling the timing
enGine and just before the first Vsync, it can result into
DSI FIFO underflow/overflow errors.

In the current case the backlight DCS command is the one
that is getting triggered just before first vsync during
bridge enable sequence.

We can avoid this by delaying the backlight update command
until first frame. Enable this on Blair and pm6125 variant
of Holi target.

Change-Id: Ic719a323e9b06839e2c729b128306b6d7d2f00a4