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Commit d15d47ac authored by Daniel Vetter's avatar Daniel Vetter
Browse files

Merge tag 'gvt-next-2016-11-17' of https://github.com/01org/gvt-linux into drm-intel-next-queued



From Zhenyu Wang:

gvt-next-2016-11-17

- Fix lock order issue found in guest stress test
- Fix several MMIO handlers to correct behavior
- Fix crash for vgpu execlist reset and memleak
- Fix a possible conflict for unresolved vfio mdev dependency
- other misc fixes

Signed-off-by: default avatarDaniel Vetter <daniel.vetter@intel.com>
parents 3975797f 53e86ada
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+2 −1
Original line number Diff line number Diff line
@@ -2537,7 +2537,8 @@ static int scan_workload(struct intel_vgpu_workload *workload)
	s.rb_va = workload->shadow_ring_buffer_va;
	s.workload = workload;

	if (bypass_scan_mask & (1 << workload->ring_id))
	if ((bypass_scan_mask & (1 << workload->ring_id)) ||
		gma_head == gma_tail)
		return 0;

	ret = ip_gma_set(&s, gma_head);
+1 −2
Original line number Diff line number Diff line
@@ -502,8 +502,7 @@ void intel_gvt_i2c_handle_aux_ch_write(struct intel_vgpu *vgpu,
	 * ACK of I2C_WRITE
	 * returned byte if it is READ
	 */

	aux_data_for_write |= (GVT_AUX_I2C_REPLY_ACK & 0xff) << 24;
	aux_data_for_write |= GVT_AUX_I2C_REPLY_ACK << 24;
	vgpu_vreg(vgpu, offset + 4) = aux_data_for_write;
}

+1 −1
Original line number Diff line number Diff line
@@ -44,7 +44,7 @@
#define GVT_AUX_I2C_READ			0x1
#define GVT_AUX_I2C_STATUS			0x2
#define GVT_AUX_I2C_MOT				0x4
#define GVT_AUX_I2C_REPLY_ACK			(0x0 << 6)
#define GVT_AUX_I2C_REPLY_ACK			0x0

struct intel_vgpu_edid_data {
	bool data_valid;
+11 −13
Original line number Diff line number Diff line
@@ -838,23 +838,21 @@ int intel_vgpu_init_execlist(struct intel_vgpu *vgpu)
}

void intel_vgpu_reset_execlist(struct intel_vgpu *vgpu,
		unsigned long ring_bitmap)
		unsigned long engine_mask)
{
	int bit;
	struct list_head *pos, *n;
	struct intel_vgpu_workload *workload = NULL;
	struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv;
	struct intel_engine_cs *engine;
	struct intel_vgpu_workload *pos, *n;
	unsigned int tmp;

	for_each_set_bit(bit, &ring_bitmap, sizeof(ring_bitmap) * 8) {
		if (bit >= I915_NUM_ENGINES)
			break;
	for_each_engine_masked(engine, dev_priv, engine_mask, tmp) {
		/* free the unsubmited workload in the queue */
		list_for_each_safe(pos, n, &vgpu->workload_q_head[bit]) {
			workload = container_of(pos,
					struct intel_vgpu_workload, list);
			list_del_init(&workload->list);
			free_workload(workload);
		list_for_each_entry_safe(pos, n,
			&vgpu->workload_q_head[engine->id], list) {
			list_del_init(&pos->list);
			free_workload(pos);
		}

		init_vgpu_execlist(vgpu, bit);
		init_vgpu_execlist(vgpu, engine->id);
	}
}
+1 −1
Original line number Diff line number Diff line
@@ -183,6 +183,6 @@ int intel_vgpu_init_execlist(struct intel_vgpu *vgpu);
int intel_vgpu_submit_execlist(struct intel_vgpu *vgpu, int ring_id);

void intel_vgpu_reset_execlist(struct intel_vgpu *vgpu,
		unsigned long ring_bitmap);
		unsigned long engine_mask);

#endif /*_GVT_EXECLIST_H_*/
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