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Commit ccf8b4e4 authored by Florian Fainelli's avatar Florian Fainelli
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ARM: dts: NSP: Wire up switch interrupts



The Switch Register Access Block (SRAB) has one interrupt for link state
change on each ports (0-5, 7-8) a PHY interrupt, timestamping interrupt
and sleep timer interrupts for each management ports (5,7,8). Wire those
up so we can utilize them to speed up link resolution.

Signed-off-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
parent 56512ffd
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