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Commit ccf6e0c4 authored by Vivek Pernamitta's avatar Vivek Pernamitta
Browse files

Revert "ARM: dts: msm: Use PCIe_MSI for Shima" 

This reverts commit 6b84a80d.
Commit 6b84a80d ("ARM: dts: msm: Use PCIe_MSI
for Shima") revert the synopsys MSI controller to GIC
interrupt controller. We are facing an issue where
wake MSI is enabled after DRV suspend by the time PCIe clocks
are off and also there is an interrupt latency with SNPS
controller.

Change-Id: Iaf47c2c8b9c188183d6ad0e72bb7d05b0b7262b7
parent 1fff7b3f

qcom/shima-pcie.dtsi

+1 −10
Original line number Diff line number Diff line
@@ -33,7 +33,7 @@ 
				0 0 0 3 &intc GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH

				0 0 0 4 &intc GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;



		msi-parent = <&pcie0_msi_snps>;

		msi-parent = <&pcie0_msi>;



		perst-gpio = <&tlmm 94 0>;

		wake-gpio = <&tlmm 96 0>;
@@ -204,15 +204,6 @@ 
		};

	};



	pcie0_msi_snps: qcom,pcie0_msi@a0000000 {

		compatible = "qcom,pci-msi";

		msi-controller;

		reg = <0xa0000000 0x0>;

		interrupt-parent = <&intc>;

		interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;

		qcom,snps;

	};



	pcie0_msi: qcom,pcie0_msi@17a10040 {

		compatible = "qcom,pci-msi";

		msi-controller;