metag: Fix misspellings in comments. (cacd2c41) · Commits · e / devices / android_kernel_fairphone_FP5

arch/metag/include/asm/metag_regs.h

+1 −1

Original line number	Original line	Diff line number	Diff line
	@@ -1165,7 +1165,7 @@
	#define TXSTATUS_IPTOGGLE_BIT 0x80000000 /* Prev PToggle of TXPRIVEXT */		#define TXSTATUS_IPTOGGLE_BIT 0x80000000 /* Prev PToggle of TXPRIVEXT */
	#define TXSTATUS_ISTATE_BIT 0x40000000 /* IState bit */		#define TXSTATUS_ISTATE_BIT 0x40000000 /* IState bit */
	#define TXSTATUS_IWAIT_BIT 0x20000000 /* wait indefinitely in decision step*/		#define TXSTATUS_IWAIT_BIT 0x20000000 /* wait indefinitely in decision step*/
	#define TXSTATUS_IEXCEPT_BIT 0x10000000 /* Indicate an exception occured */		#define TXSTATUS_IEXCEPT_BIT 0x10000000 /* Indicate an exception occurred */
	#define TXSTATUS_IRPCOUNT_BITS 0x0E000000 /* Number of 'dirty' date entries*/		#define TXSTATUS_IRPCOUNT_BITS 0x0E000000 /* Number of 'dirty' date entries*/
	#define TXSTATUS_IRPCOUNT_S 25		#define TXSTATUS_IRPCOUNT_S 25
	#define TXSTATUS_IRQSTAT_BITS 0x0000F000 /* IRQEnc bits, trigger or interrupts */		#define TXSTATUS_IRQSTAT_BITS 0x0000F000 /* IRQEnc bits, trigger or interrupts */

arch/metag/include/asm/tbx.h

+3 −3

arch/metag/tbx/tbipcx.S

+1 −1

Original line number	Original line	Diff line number	Diff line
	@@ -15,7 +15,7 @@
	#include <asm/tbx.h>		#include <asm/tbx.h>

	/* BEGIN HACK */		/* BEGIN HACK */
	/* define these for now while doing inital conversion to GAS		/* define these for now while doing initial conversion to GAS
	will fix properly later */		will fix properly later */

	/* Signal identifiers always have the TBID_SIGNAL_BIT set and contain the		/* Signal identifiers always have the TBID_SIGNAL_BIT set and contain the

arch/metag/tbx/tbisoft.S

+3 −3

Original line number	Original line	Diff line number	Diff line
	@@ -668,7 +668,7 @@ typedef union _tbires_tag_ {

	State.Sig.TrigMask will indicate the bits set within TXMASKI at		State.Sig.TrigMask will indicate the bits set within TXMASKI at
	the time of the handler call that have all been cleared to prevent		the time of the handler call that have all been cleared to prevent
	nested interrupt occuring immediately.		nested interrupt occurring immediately.

	State.Sig.SaveMask is a bit-mask which will be set to Zero when a trigger		State.Sig.SaveMask is a bit-mask which will be set to Zero when a trigger
	occurs at background level and TBICTX_CRIT_BIT and optionally		occurs at background level and TBICTX_CRIT_BIT and optionally
	@@ -1083,7 +1083,7 @@ TBIRES __TBINestInts( TBIRES State, void *pExt, int NoNestMask );
	/* This routine causes the TBICTX structure specified in State.Sig.pCtx to		/* This routine causes the TBICTX structure specified in State.Sig.pCtx to
	be restored. This implies that execution will not return to the caller.		be restored. This implies that execution will not return to the caller.
	The State.Sig.TrigMask field will be restored during the context switch		The State.Sig.TrigMask field will be restored during the context switch
	such that any immediately occuring interrupts occur in the context of the		such that any immediately occurring interrupts occur in the context of the
	newly specified task. The State.Sig.SaveMask parameter is ignored. */		newly specified task. The State.Sig.SaveMask parameter is ignored. */
	void __TBIASyncResume( TBIRES State );		void __TBIASyncResume( TBIRES State );

	@@ -1305,7 +1305,7 @@ extern const char __TBISigNames[];

	/*		/*
	* Calculate linear PC value from real PC and Minim mode control, the LSB of		* Calculate linear PC value from real PC and Minim mode control, the LSB of
	* the result returned indicates if address compression has occured.		* the result returned indicates if address compression has occurred.
	*/		*/
	#ifndef __ASSEMBLY__		#ifndef __ASSEMBLY__
	#define METAG_LINPC( PCVal ) (\		#define METAG_LINPC( PCVal ) (\

Original line number	Original line	Diff line number	Diff line
	@@ -56,7 +56,7 @@ ___TBIJumpX:
	/*		/*
	* TBIRES __TBISwitch( TBIRES Switch, PTBICTX *rpSaveCtx )		* TBIRES __TBISwitch( TBIRES Switch, PTBICTX *rpSaveCtx )
	*		*
	* Software syncronous context switch between soft threads, save only the		* Software synchronous context switch between soft threads, save only the
	* registers which are actually valid on call entry.		* registers which are actually valid on call entry.
	*		*
	* A0FrP, D0RtP, D0.5, D0.6, D0.7 - Saved on stack		* A0FrP, D0RtP, D0.5, D0.6, D0.7 - Saved on stack
	@@ -76,7 +76,7 @@ $LSwitchStart:
	SETL [A0StP+#8++],D0FrT,D1RtP		SETL [A0StP+#8++],D0FrT,D1RtP
	/*		/*
	* Save current frame state - we save all regs because we don't want		* Save current frame state - we save all regs because we don't want
	* uninitialised crap in the TBICTX structure that the asyncronous resumption		* uninitialised crap in the TBICTX structure that the asynchronous resumption
	* of a thread will restore.		* of a thread will restore.
	*/		*/
	MOVT D1Re0,#HI($LSwitchExit) /* ASync resume point here */		MOVT D1Re0,#HI($LSwitchExit) /* ASync resume point here */
	@@ -117,7 +117,7 @@ $LSwitchExit:
	* This routine causes the TBICTX structure specified in State.Sig.pCtx to		* This routine causes the TBICTX structure specified in State.Sig.pCtx to
	* be restored. This implies that execution will not return to the caller.		* be restored. This implies that execution will not return to the caller.
	* The State.Sig.TrigMask field will be ored into TXMASKI during the		* The State.Sig.TrigMask field will be ored into TXMASKI during the
	* context switch such that any immediately occuring interrupts occur in		* context switch such that any immediately occurring interrupts occur in
	* the context of the newly specified task. The State.Sig.SaveMask parameter		* the context of the newly specified task. The State.Sig.SaveMask parameter
	* is ignored.		* is ignored.
	*/		*/