Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit c78751f9 authored by Jeffy Chen's avatar Jeffy Chen Committed by Heiko Stuebner
Browse files

ARM: dts: rockchip: add clocks in iommu nodes



Add clocks in iommu nodes, since we are going to control clocks in
rockchip iommu driver.

Signed-off-by: default avatarJeffy Chen <jeffy.chen@rock-chips.com>
Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent c887f5b0
Loading
Loading
Loading
Loading
+2 −0
Original line number Diff line number Diff line
@@ -197,6 +197,8 @@
		reg = <0x10118300 0x100>;
		interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-names = "vop_mmu";
		clocks = <&cru ACLK_LCDC>, <&cru HCLK_LCDC>;
		clock-names = "aclk", "iface";
		#iommu-cells = <0>;
		status = "disabled";
	};
+8 −0
Original line number Diff line number Diff line
@@ -584,6 +584,8 @@
		reg = <0x20020800 0x100>;
		interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-names = "vpu_mmu";
		clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
		clock-names = "aclk", "iface";
		iommu-cells = <0>;
		status = "disabled";
	};
@@ -593,6 +595,8 @@
		reg = <0x20030480 0x40>, <0x200304c0 0x40>;
		interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-names = "vdec_mmu";
		clocks = <&cru ACLK_RKVDEC>, <&cru HCLK_RKVDEC>;
		clock-names = "aclk", "iface";
		iommu-cells = <0>;
		status = "disabled";
	};
@@ -602,6 +606,8 @@
		reg = <0x20053f00 0x100>;
		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-names = "vop_mmu";
		clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>;
		clock-names = "aclk", "iface";
		iommu-cells = <0>;
		status = "disabled";
	};
@@ -611,6 +617,8 @@
		reg = <0x20070800 0x100>;
		interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-names = "iep_mmu";
		clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>;
		clock-names = "aclk", "iface";
		iommu-cells = <0>;
		status = "disabled";
	};
+12 −0
Original line number Diff line number Diff line
@@ -959,6 +959,8 @@
		reg = <0x0 0xff900800 0x0 0x40>;
		interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-names = "iep_mmu";
		clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>;
		clock-names = "aclk", "iface";
		#iommu-cells = <0>;
		status = "disabled";
	};
@@ -968,6 +970,8 @@
		reg = <0x0 0xff914000 0x0 0x100>, <0x0 0xff915000 0x0 0x100>;
		interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-names = "isp_mmu";
		clocks = <&cru ACLK_ISP>, <&cru HCLK_ISP>;
		clock-names = "aclk", "iface";
		#iommu-cells = <0>;
		rockchip,disable-mmu-reset;
		status = "disabled";
@@ -1027,6 +1031,8 @@
		reg = <0x0 0xff930300 0x0 0x100>;
		interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-names = "vopb_mmu";
		clocks = <&cru ACLK_VOP0>, <&cru HCLK_VOP0>;
		clock-names = "aclk", "iface";
		power-domains = <&power RK3288_PD_VIO>;
		#iommu-cells = <0>;
		status = "disabled";
@@ -1075,6 +1081,8 @@
		reg = <0x0 0xff940300 0x0 0x100>;
		interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-names = "vopl_mmu";
		clocks = <&cru ACLK_VOP1>, <&cru HCLK_VOP1>;
		clock-names = "aclk", "iface";
		power-domains = <&power RK3288_PD_VIO>;
		#iommu-cells = <0>;
		status = "disabled";
@@ -1206,6 +1214,8 @@
		reg = <0x0 0xff9a0800 0x0 0x100>;
		interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-names = "vpu_mmu";
		clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>;
		clock-names = "aclk", "iface";
		#iommu-cells = <0>;
		status = "disabled";
	};
@@ -1215,6 +1225,8 @@
		reg = <0x0 0xff9c0440 0x0 0x40>, <0x0 0xff9c0480 0x0 0x40>;
		interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-names = "hevc_mmu";
		clocks = <&cru ACLK_HEVC>, <&cru HCLK_HEVC>;
		clock-names = "aclk", "iface";
		#iommu-cells = <0>;
		status = "disabled";
	};