Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit c6956728 authored by Paul Burton's avatar Paul Burton Committed by Ralf Baechle
Browse files

MIPS: Tidy EntryLo bit definitions, add PFN 



Tidy up the definition of the EntryLo RI & XI bits using BITS_PER_LONG
rather than #ifdef'ing on CONFIG_64BIT, and add a definition for the
offset to the PFN field for use by a later patch.

Signed-off-by: default avatarPaul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-kernel@vger.kernel.org
Cc: James Hogan <james.hogan@imgtec.com>
Cc: Markos Chandras <markos.chandras@imgtec.com>
Patchwork: https://patchwork.linux-mips.org/patch/11217/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent c676589b

arch/mips/include/asm/mipsregs.h

+3 −9
Original line number Diff line number Diff line
@@ -132,15 +132,9 @@ 
#define R3K_ENTRYLO_N		(_ULCAST_(1) << 11)



/* MIPS32/64 EntryLo bit definitions */

#ifdef CONFIG_64BIT

/* as read by dmfc0 */

#define MIPS_ENTRYLO_XI		(_ULCAST_(1) << 62)

#define MIPS_ENTRYLO_RI		(_ULCAST_(1) << 63)

#else

/* as read by mfc0 */

#define MIPS_ENTRYLO_XI		(_ULCAST_(1) << 30)

#define MIPS_ENTRYLO_RI		(_ULCAST_(1) << 31)

#endif

#define MIPS_ENTRYLO_PFN_SHIFT	6

#define MIPS_ENTRYLO_XI		(_ULCAST_(1) << (BITS_PER_LONG - 2))

#define MIPS_ENTRYLO_RI		(_ULCAST_(1) << (BITS_PER_LONG - 1))



/*

 * Values for PageMask register