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Commit c676589b authored by Paul Burton's avatar Paul Burton Committed by Ralf Baechle
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MIPS: tlbex: Share MIPS32 32 bit phys & MIPS64 64 bit phys code 



The code in build_update_entries for 64 bit physical addresses on a
MIPS64 CPU and 32 bit physical addresses on a MIPS32 CPU is now
identical, with the exception of r4k bug workaround in the latter which
would simply not apply to the former. Remove the duplication and some

Signed-off-by: default avatarPaul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Cc: linux-kernel@vger.kernel.org
Cc: James Hogan <james.hogan@imgtec.com>
Cc: Markos Chandras <markos.chandras@imgtec.com>
Patchwork: https://patchwork.linux-mips.org/patch/11216/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 974a0b6a

arch/mips/mm/tlbex.c

+3 −11
Original line number Diff line number Diff line
@@ -1005,15 +1005,7 @@ static void build_update_entries(u32 **p, unsigned int tmp, unsigned int ptep) 
	 * 64bit address support (36bit on a 32bit CPU) in a 32bit

	 * Kernel is a special case. Only a few CPUs use it.

	 */

#ifdef CONFIG_PHYS_ADDR_T_64BIT

	if (cpu_has_64bits) {

		uasm_i_ld(p, tmp, 0, ptep); /* get even pte */

		uasm_i_ld(p, ptep, sizeof(pte_t), ptep); /* get odd pte */

		build_convert_pte_to_entrylo(p, tmp);

		UASM_i_MTC0(p, tmp, C0_ENTRYLO0); /* load it */

		build_convert_pte_to_entrylo(p, ptep);

		UASM_i_MTC0(p, ptep, C0_ENTRYLO1); /* load it */

	} else {

	if (config_enabled(CONFIG_PHYS_ADDR_T_64BIT) && !cpu_has_64bits) {

		int pte_off_even = sizeof(pte_t) / 2;

		int pte_off_odd = pte_off_even + sizeof(pte_t);

#ifdef CONFIG_XPA
@@ -1037,8 +1029,9 @@ static void build_update_entries(u32 **p, unsigned int tmp, unsigned int ptep) 
		uasm_i_mthc0(p, tmp, C0_ENTRYLO0);

		uasm_i_mthc0(p, ptep, C0_ENTRYLO1);

#endif

		return;

	}

#else



	UASM_i_LW(p, tmp, 0, ptep); /* get even pte */

	UASM_i_LW(p, ptep, sizeof(pte_t), ptep); /* get odd pte */

	if (r45k_bvahwbug())
@@ -1053,7 +1046,6 @@ static void build_update_entries(u32 **p, unsigned int tmp, unsigned int ptep) 
	if (r4k_250MHZhwbug())

		UASM_i_MTC0(p, 0, C0_ENTRYLO1);

	UASM_i_MTC0(p, ptep, C0_ENTRYLO1); /* load it */

#endif

}



struct mips_huge_tlb_info {