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Commit c5f6d578 authored by Tvrtko Ursulin's avatar Tvrtko Ursulin
Browse files

drm/i915: Log HWS seqno consistently



We mix hexa- and decimal which is confusing when reading the logs. So make
the single odd one out instance decimal for consistency.

v2:
 * Do the intel_ringbuffer.c as well. (Chris Wilson)

Signed-off-by: default avatarTvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20180926145033.16318-1-tvrtko.ursulin@linux.intel.com
parent f8e57863
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+1 −1
Original line number Diff line number Diff line
@@ -1904,7 +1904,7 @@ static void execlists_reset(struct intel_engine_cs *engine,
	unsigned long flags;
	u32 *regs;

	GEM_TRACE("%s request global=%x, current=%d\n",
	GEM_TRACE("%s request global=%d, current=%d\n",
		  engine->name, request ? request->global_seqno : 0,
		  intel_engine_get_seqno(engine));

+3 −1
Original line number Diff line number Diff line
@@ -574,7 +574,9 @@ static void skip_request(struct i915_request *rq)

static void reset_ring(struct intel_engine_cs *engine, struct i915_request *rq)
{
	GEM_TRACE("%s seqno=%x\n", engine->name, rq ? rq->global_seqno : 0);
	GEM_TRACE("%s request global=%d, current=%d\n",
		  engine->name, rq ? rq->global_seqno : 0,
		  intel_engine_get_seqno(engine));

	/*
	 * Try to restore the logical GPU state to match the continuation