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Commit c503ce60 authored by Vivek Aknurwar's avatar Vivek Aknurwar
Browse files

clk: qcom: gdsc-regulator: Poll PWR_ON during GDSC HW to SW mode switch 



While switching from HW to SW control mode, HW may be busy updating
internal required signals. Add a check that polls for PWR_ON status
bit to ensure that the GDSC switches to SW mode before software starts
to use SW mode.

Change-Id: Ie6bd5c5e8c073fb70c696eeb6e911219108f9260
Signed-off-by: default avatarVivek Aknurwar <viveka@codeaurora.org>
parent 25339ae9

drivers/clk/qcom/gdsc-regulator.c

+14 −0
Original line number Diff line number Diff line
@@ -499,6 +499,20 @@ static int gdsc_set_mode(struct regulator_dev *rdev, unsigned int mode) 
		 */

		gdsc_mb(sc);

		udelay(1);

		/*

		 * While switching from HW to SW mode, HW may be busy

		 * updating internal required signals. Polling for PWR_ON

		 * ensures that the GDSC switches to SW mode before software

		 * starts to use SW mode.

		 */

		if (sc->is_gdsc_enabled) {

			ret = poll_gdsc_status(sc, ENABLED);

			if (ret) {

				dev_err(&rdev->dev, "%s enable timed out\n",

					sc->rdesc.name);

				goto done;

			}

		}

		sc->is_gdsc_hw_ctrl_mode = false;

		break;

	default: