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Commit c300af28 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'riscv-for-linus-4.20-mw0' of... 

Merge tag 'riscv-for-linus-4.20-mw0' of git://git.kernel.org/pub/scm/linux/kernel/git/palmer/riscv-linux

Pull RISC-V updates from Palmer Dabbelt:
 "This patch set contains a lot (at least, for me) of improvements to
  the RISC-V kernel port:

   - The removal of some cacheinfo values that were bogus.

   - On systems with F but without D the kernel will not show the F
     extension to userspace, as it isn't actually supported.

   - Support for futexes.

   - Removal of some unused code.

   - Cleanup of some menuconfig entries.

   - Support for systems without a floating-point unit, and for building
     kernels that will never use the floating-point unit.

   - More fixes to the RV32I port, which regressed again. It's really
     time to get this into a regression test somewhere so I stop
     breaking it. Thanks to Zong for resurrecting it again!

   - Various fixes that resulted from a year old review of our original
     patch set that I finally got around to.

   - Various improvements to SMP support, largely based around having
     switched to logical hart numbering, as well as some interrupt
     improvements. This one is in the same patch set as above, thanks to
     Atish for sheparding everything though as my patch set was a bit of
     a mess.

  I'm pretty sure this is our largest patch set since the original
  kernel contribution, and it's certainly the one with the most
  contributors. While I don't have anything else I know I'm going to
  submit for the merge window, I would be somewhat surprised if I didn't
  screw anything up.

  Thanks for the help, everyone!"

* tag 'riscv-for-linus-4.20-mw0' of git://git.kernel.org/pub/scm/linux/kernel/git/palmer/riscv-linux: (31 commits)
  RISC-V: Cosmetic menuconfig changes
  riscv: move GCC version check for ARCH_SUPPORTS_INT128 to Kconfig
  RISC-V: remove the unused return_to_handler export
  RISC-V: Add futex support.
  RISC-V: Add FP register ptrace support for gdb.
  RISC-V: Mask out the F extension on systems without D
  RISC-V: Don't set cacheinfo.{physical_line_partition,attributes}
  RISC-V: Show IPI stats
  RISC-V: Show CPU ID and Hart ID separately in /proc/cpuinfo
  RISC-V: Use Linux logical CPU number instead of hartid
  RISC-V: Add logical CPU indexing for RISC-V
  RISC-V: Use WRITE_ONCE instead of direct access
  RISC-V: Use mmgrab()
  RISC-V: Rename im_okay_therefore_i_am to found_boot_cpu
  RISC-V: Rename riscv_of_processor_hart to riscv_of_processor_hartid
  RISC-V: Provide a cleaner raw_smp_processor_id()
  RISC-V: Disable preemption before enabling interrupts
  RISC-V: Comment on the TLB flush in smp_callin()
  RISC-V: Filter ISA and MMU values in cpuinfo
  RISC-V: Don't set cacheinfo.{physical_line_partition,attributes}
  ...
parents 0d1e8b8d d26c4bbf

arch/riscv/Kconfig

+51 −1
Original line number Diff line number Diff line
@@ -31,6 +31,7 @@ config RISCV 
	select HAVE_MEMBLOCK

	select HAVE_MEMBLOCK_NODE_MAP

	select HAVE_DMA_CONTIGUOUS

	select HAVE_FUTEX_CMPXCHG if FUTEX

	select HAVE_GENERIC_DMA_COHERENT

	select HAVE_PERF_EVENTS

	select IRQ_DOMAIN
@@ -108,10 +109,12 @@ config ARCH_RV32I 
	select GENERIC_LIB_ASHRDI3

	select GENERIC_LIB_LSHRDI3

	select GENERIC_LIB_UCMPDI2

	select GENERIC_LIB_UMODDI3



config ARCH_RV64I

	bool "RV64I"

	select 64BIT

	select ARCH_SUPPORTS_INT128 if GCC_VERSION >= 50000

	select HAVE_FUNCTION_TRACER

	select HAVE_FUNCTION_GRAPH_TRACER

	select HAVE_FTRACE_MCOUNT_RECORD
@@ -208,14 +211,61 @@ config RISCV_BASE_PMU 


endmenu



config FPU

	bool "FPU support"

	default y

	help

	  Say N here if you want to disable all floating-point related procedure

	  in the kernel.



	  If you don't know what to do here, say Y.



endmenu



menu "Kernel type"

menu "Kernel features"



source "kernel/Kconfig.hz"



endmenu



menu "Boot options"



config CMDLINE_BOOL

	bool "Built-in kernel command line"

	help

	  For most platforms, it is firmware or second stage bootloader

	  that by default specifies the kernel command line options.

	  However, it might be necessary or advantageous to either override

	  the default kernel command line or add a few extra options to it.

	  For such cases, this option allows hardcoding command line options

	  directly into the kernel.



	  For that, choose 'Y' here and fill in the extra boot parameters

	  in CONFIG_CMDLINE.



	  The built-in options will be concatenated to the default command

	  line if CMDLINE_FORCE is set to 'N'. Otherwise, the default

	  command line will be ignored and replaced by the built-in string.



config CMDLINE

	string "Built-in kernel command string"

	depends on CMDLINE_BOOL

	default ""

	help

	  Supply command-line options at build time by entering them here.



config CMDLINE_FORCE

	bool "Built-in command line overrides bootloader arguments"

	depends on CMDLINE_BOOL

	help

	  Set this option to 'Y' to have the kernel ignore the bootloader

	  or firmware command line.  Instead, the built-in command line

	  will be used exclusively.



	  If you don't know what to do here, say N.



endmenu



menu "Bus support"



config PCI

arch/riscv/Kconfig.debug

+0 −35
Original line number Diff line number Diff line 


config CMDLINE_BOOL

	bool "Built-in kernel command line"

	help

	  For most platforms, it is firmware or second stage bootloader

	  that by default specifies the kernel command line options.

	  However, it might be necessary or advantageous to either override

	  the default kernel command line or add a few extra options to it.

	  For such cases, this option allows hardcoding command line options

	  directly into the kernel.



	  For that, choose 'Y' here and fill in the extra boot parameters

	  in CONFIG_CMDLINE.



	  The built-in options will be concatenated to the default command

	  line if CMDLINE_FORCE is set to 'N'. Otherwise, the default

	  command line will be ignored and replaced by the built-in string.



config CMDLINE

	string "Built-in kernel command string"

	depends on CMDLINE_BOOL

	default ""

	help

	  Supply command-line options at build time by entering them here.



config CMDLINE_FORCE

	bool "Built-in command line overrides bootloader arguments"

	depends on CMDLINE_BOOL

	help

	  Set this option to 'Y' to have the kernel ignore the bootloader

	  or firmware command line.  Instead, the built-in command line

	  will be used exclusively.



	  If you don't know what to do here, say N.



config EARLY_PRINTK

	def_bool y

arch/riscv/Makefile

+8 −13
Original line number Diff line number Diff line
@@ -26,9 +26,6 @@ ifeq ($(CONFIG_ARCH_RV64I),y) 
	KBUILD_CFLAGS += -mabi=lp64

	KBUILD_AFLAGS += -mabi=lp64



	KBUILD_CFLAGS	+= $(call cc-ifversion, -ge, 0500, -DCONFIG_ARCH_SUPPORTS_INT128)



	KBUILD_MARCH = rv64im

	KBUILD_LDFLAGS += -melf64lriscv

else

	BITS := 32
@@ -36,22 +33,20 @@ else 


	KBUILD_CFLAGS += -mabi=ilp32

	KBUILD_AFLAGS += -mabi=ilp32

	KBUILD_MARCH = rv32im

	KBUILD_LDFLAGS += -melf32lriscv

endif



KBUILD_CFLAGS += -Wall



ifeq ($(CONFIG_RISCV_ISA_A),y)

	KBUILD_ARCH_A = a

endif

ifeq ($(CONFIG_RISCV_ISA_C),y)

	KBUILD_ARCH_C = c

endif



KBUILD_AFLAGS += -march=$(KBUILD_MARCH)$(KBUILD_ARCH_A)fd$(KBUILD_ARCH_C)

# ISA string setting

riscv-march-$(CONFIG_ARCH_RV32I)	:= rv32im

riscv-march-$(CONFIG_ARCH_RV64I)	:= rv64im

riscv-march-$(CONFIG_RISCV_ISA_A)	:= $(riscv-march-y)a

riscv-march-$(CONFIG_FPU)		:= $(riscv-march-y)fd

riscv-march-$(CONFIG_RISCV_ISA_C)	:= $(riscv-march-y)c

KBUILD_CFLAGS += -march=$(subst fd,,$(riscv-march-y))

KBUILD_AFLAGS += -march=$(riscv-march-y)



KBUILD_CFLAGS += -march=$(KBUILD_MARCH)$(KBUILD_ARCH_A)$(KBUILD_ARCH_C)

KBUILD_CFLAGS += -mno-save-restore

KBUILD_CFLAGS += -DCONFIG_PAGE_OFFSET=$(CONFIG_PAGE_OFFSET)

arch/riscv/include/asm/Kbuild

+0 −1
Original line number Diff line number Diff line
@@ -13,7 +13,6 @@ generic-y += errno.h 
generic-y += exec.h

generic-y += fb.h

generic-y += fcntl.h

generic-y += futex.h

generic-y += hardirq.h

generic-y += hash.h

generic-y += hw_irq.h

arch/riscv/include/asm/futex.h

0 → 100644
+128 −0
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0 */

/*

 * Copyright (c) 2006  Ralf Baechle (ralf@linux-mips.org)

 * Copyright (c) 2018  Jim Wilson (jimw@sifive.com)

 */



#ifndef _ASM_FUTEX_H

#define _ASM_FUTEX_H



#ifndef CONFIG_RISCV_ISA_A

/*

 * Use the generic interrupt disabling versions if the A extension

 * is not supported.

 */

#ifdef CONFIG_SMP

#error "Can't support generic futex calls without A extension on SMP"

#endif

#include <asm-generic/futex.h>



#else /* CONFIG_RISCV_ISA_A */



#include <linux/futex.h>

#include <linux/uaccess.h>

#include <linux/errno.h>

#include <asm/asm.h>



#define __futex_atomic_op(insn, ret, oldval, uaddr, oparg)	\

{								\

	uintptr_t tmp;						\

	__enable_user_access();					\

	__asm__ __volatile__ (					\

	"1:	" insn "				\n"	\

	"2:						\n"	\

	"	.section .fixup,\"ax\"			\n"	\

	"	.balign 4				\n"	\

	"3:	li %[r],%[e]				\n"	\

	"	jump 2b,%[t]				\n"	\

	"	.previous				\n"	\

	"	.section __ex_table,\"a\"		\n"	\

	"	.balign " RISCV_SZPTR "			\n"	\

	"	" RISCV_PTR " 1b, 3b			\n"	\

	"	.previous				\n"	\

	: [r] "+r" (ret), [ov] "=&r" (oldval),			\

	  [u] "+m" (*uaddr), [t] "=&r" (tmp)			\

	: [op] "Jr" (oparg), [e] "i" (-EFAULT)			\

	: "memory");						\

	__disable_user_access();				\

}



static inline int

arch_futex_atomic_op_inuser(int op, int oparg, int *oval, u32 __user *uaddr)

{

	int oldval = 0, ret = 0;



	pagefault_disable();



	switch (op) {

	case FUTEX_OP_SET:

		__futex_atomic_op("amoswap.w.aqrl %[ov],%z[op],%[u]",

				  ret, oldval, uaddr, oparg);

		break;

	case FUTEX_OP_ADD:

		__futex_atomic_op("amoadd.w.aqrl %[ov],%z[op],%[u]",

				  ret, oldval, uaddr, oparg);

		break;

	case FUTEX_OP_OR:

		__futex_atomic_op("amoor.w.aqrl %[ov],%z[op],%[u]",

				  ret, oldval, uaddr, oparg);

		break;

	case FUTEX_OP_ANDN:

		__futex_atomic_op("amoand.w.aqrl %[ov],%z[op],%[u]",

				  ret, oldval, uaddr, ~oparg);

		break;

	case FUTEX_OP_XOR:

		__futex_atomic_op("amoxor.w.aqrl %[ov],%z[op],%[u]",

				  ret, oldval, uaddr, oparg);

		break;

	default:

		ret = -ENOSYS;

	}



	pagefault_enable();



	if (!ret)

		*oval = oldval;



	return ret;

}



static inline int

futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,

			      u32 oldval, u32 newval)

{

	int ret = 0;

	u32 val;

	uintptr_t tmp;



	if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32)))

		return -EFAULT;



	__enable_user_access();

	__asm__ __volatile__ (

	"1:	lr.w.aqrl %[v],%[u]			\n"

	"	bne %[v],%z[ov],3f			\n"

	"2:	sc.w.aqrl %[t],%z[nv],%[u]		\n"

	"	bnez %[t],1b				\n"

	"3:						\n"

	"	.section .fixup,\"ax\"			\n"

	"	.balign 4				\n"

	"4:	li %[r],%[e]				\n"

	"	jump 3b,%[t]				\n"

	"	.previous				\n"

	"	.section __ex_table,\"a\"		\n"

	"	.balign " RISCV_SZPTR "			\n"

	"	" RISCV_PTR " 1b, 4b			\n"

	"	" RISCV_PTR " 2b, 4b			\n"

	"	.previous				\n"

	: [r] "+r" (ret), [v] "=&r" (val), [u] "+m" (*uaddr), [t] "=&r" (tmp)

	: [ov] "Jr" (oldval), [nv] "Jr" (newval), [e] "i" (-EFAULT)

	: "memory");

	__disable_user_access();



	*uval = val;

	return ret;

}



#endif /* CONFIG_RISCV_ISA_A */

#endif /* _ASM_FUTEX_H */