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Commit c0f0ff87 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "msm: kgsl: Allow access to QDSS only when coresight is enabled"

parents 1fc0fad0 5c364b0d

drivers/gpu/msm/adreno_a6xx_gmu.c

+15 −2
Original line number Diff line number Diff line
@@ -2632,7 +2632,7 @@ int a6xx_gmu_probe(struct kgsl_device *device, 
	struct adreno_device *adreno_dev = ADRENO_DEVICE(device);

	struct a6xx_gmu_device *gmu = to_a6xx_gmu(adreno_dev);

	struct resource *res;

	int ret;

	int ret, i;



	gmu->pdev = pdev;
@@ -2662,7 +2662,20 @@ int a6xx_gmu_probe(struct kgsl_device *device, 
	ret = devm_clk_bulk_get_all(&pdev->dev, &gmu->clks);

	if (ret < 0)

		return ret;



	/*

	 * Voting for apb_pclk will enable power and clocks required for

	 * QDSS path to function. However, if CORESIGHT is not enabled,

	 * QDSS is essentially unusable. Hence, if QDSS cannot be used,

	 * don't vote for this clock.

	 */

	if (!IS_ENABLED(CONFIG_CORESIGHT)) {

		for (i = 0; i < ret; i++) {

			if (!strcmp(gmu->clks[i].id, "apb_pclk")) {

				gmu->clks[i].clk = NULL;

				break;

			}

		}

	}

	gmu->num_clks = ret;



	/* Set up GMU IOMMU and shared memory with GMU */

drivers/gpu/msm/adreno_a6xx_rgmu.c

+15 −2
Original line number Diff line number Diff line
@@ -1248,12 +1248,25 @@ static int a6xx_rgmu_regulators_probe(struct a6xx_rgmu_device *rgmu) 
static int a6xx_rgmu_clocks_probe(struct a6xx_rgmu_device *rgmu,

		struct device_node *node)

{

	int ret;

	int ret, i;



	ret = devm_clk_bulk_get_all(&rgmu->pdev->dev, &rgmu->clks);

	if (ret < 0)

		return ret;



	/*

	 * Voting for apb_pclk will enable power and clocks required for

	 * QDSS path to function. However, if CORESIGHT is not enabled,

	 * QDSS is essentially unusable. Hence, if QDSS cannot be used,

	 * don't vote for this clock.

	 */

	if (!IS_ENABLED(CONFIG_CORESIGHT)) {

		for (i = 0; i < ret; i++) {

			if (!strcmp(rgmu->clks[i].id, "apb_pclk")) {

				rgmu->clks[i].clk = NULL;

				break;

			}

		}

	}

	rgmu->num_clks = ret;



	rgmu->gpu_clk = kgsl_of_clk_by_name(rgmu->clks, ret, "core");

drivers/gpu/msm/kgsl_iommu.c

+4 −3
Original line number Diff line number Diff line
@@ -2511,7 +2511,8 @@ int kgsl_iommu_probe(struct kgsl_device *device) 
	 */

	kgsl_iommu_map_globals(mmu, mmu->defaultpagetable);

	kgsl_iommu_map_globals(mmu, mmu->lpac_pagetable);



	/* QDSS is supported only when CORESIGHT is enabled */

	if (IS_ENABLED(CONFIG_CORESIGHT))

		device->qdss_desc = kgsl_allocate_global_fixed(device,

					"qcom,gpu-qdss-stm", "gpu-qdss");

drivers/gpu/msm/kgsl_pwrctrl.c

+3 −0
Original line number Diff line number Diff line
@@ -1426,6 +1426,9 @@ static int _get_clocks(struct kgsl_device *device) 
		for (i = 0; i < KGSL_MAX_CLKS; i++) {

			if (pwr->grp_clks[i] || strcmp(clocks[i], name))

				continue;

			/* apb_pclk should only be enabled if CORESIGHT is enabled */

			if (!strcmp(name, "apb_pclk") && !IS_ENABLED(CONFIG_CORESIGHT))

				continue;



			pwr->grp_clks[i] = devm_clk_get(dev, name);