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Commit c039b7f2 authored by Ville Syrjälä's avatar Ville Syrjälä Committed by Daniel Vetter
Browse files

drm/i915: Include MCHBAR_MIRROR_BASE in ILK_GDSR 



Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: default avatarJani Nikula <jani.nikula@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent d3a93cbe

drivers/gpu/drm/i915/i915_reg.h

+1 −1
Original line number Diff line number Diff line
@@ -105,7 +105,7 @@ 
#define  GRDOM_RESET_STATUS (1<<1)

#define  GRDOM_RESET_ENABLE (1<<0)



#define ILK_GDSR 0x2ca4 /* MCHBAR offset */

#define ILK_GDSR (MCHBAR_MIRROR_BASE + 0x2ca4)

#define  ILK_GRDOM_FULL		(0<<1)

#define  ILK_GRDOM_RENDER	(1<<1)

#define  ILK_GRDOM_MEDIA	(3<<1)

drivers/gpu/drm/i915/intel_uncore.c

+5 −5
Original line number Diff line number Diff line
@@ -1429,21 +1429,21 @@ static int ironlake_do_reset(struct drm_device *dev) 
	struct drm_i915_private *dev_priv = dev->dev_private;

	int ret;



	I915_WRITE(MCHBAR_MIRROR_BASE + ILK_GDSR,

	I915_WRITE(ILK_GDSR,

		   ILK_GRDOM_RENDER | ILK_GRDOM_RESET_ENABLE);

	ret = wait_for((I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR) &

	ret = wait_for((I915_READ(ILK_GDSR) &

			ILK_GRDOM_RESET_ENABLE) == 0, 500);

	if (ret)

		return ret;



	I915_WRITE(MCHBAR_MIRROR_BASE + ILK_GDSR,

	I915_WRITE(ILK_GDSR,

		   ILK_GRDOM_MEDIA | ILK_GRDOM_RESET_ENABLE);

	ret = wait_for((I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR) &

	ret = wait_for((I915_READ(ILK_GDSR) &

			ILK_GRDOM_RESET_ENABLE) == 0, 500);

	if (ret)

		return ret;



	I915_WRITE(MCHBAR_MIRROR_BASE + ILK_GDSR, 0);

	I915_WRITE(ILK_GDSR, 0);



	return 0;

}