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Commit bd6f2745 authored by Josh Wu's avatar Josh Wu Committed by Mauro Carvalho Chehab
Browse files

[media] v4l: atmel-isi: Should clear bits before set the hardware register 



In the ISI driver it reads the config register to get original value,
then set the correct FRATE_DIV and YCC_SWAP_MODE directly. This will
cause some bits overlap.

So we need to clear these bits first, then set correct value. This patch
fix it.

Signed-off-by: default avatarJosh Wu <josh.wu@atmel.com>
Acked-by: default avatarLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: default avatarMauro Carvalho Chehab <m.chehab@samsung.com>
parent 135983e8

drivers/media/platform/soc_camera/atmel-isi.c

+3 −0
Original line number Diff line number Diff line
@@ -132,6 +132,8 @@ static int configure_geometry(struct atmel_isi *isi, u32 width, 
	isi_writel(isi, ISI_CTRL, ISI_CTRL_DIS);



	cfg2 = isi_readl(isi, ISI_CFG2);

	/* Set YCC swap mode */

	cfg2 &= ~ISI_CFG2_YCC_SWAP_MODE_MASK;

	cfg2 |= cr;

	/* Set width */

	cfg2 &= ~(ISI_CFG2_IM_HSIZE_MASK);
@@ -346,6 +348,7 @@ static void start_dma(struct atmel_isi *isi, struct frame_buffer *buffer) 
	isi_writel(isi, ISI_DMA_C_CTRL, ISI_DMA_CTRL_FETCH | ISI_DMA_CTRL_DONE);

	isi_writel(isi, ISI_DMA_CHER, ISI_DMA_CHSR_C_CH);



	cfg1 &= ~ISI_CFG1_FRATE_DIV_MASK;

	/* Enable linked list */

	cfg1 |= isi->pdata->frate | ISI_CFG1_DISCR;

include/media/atmel-isi.h

+2 −0
Original line number Diff line number Diff line
@@ -56,6 +56,7 @@ 
#define		ISI_CFG1_FRATE_DIV_6		(5 << 8)

#define		ISI_CFG1_FRATE_DIV_7		(6 << 8)

#define		ISI_CFG1_FRATE_DIV_8		(7 << 8)

#define		ISI_CFG1_FRATE_DIV_MASK		(7 << 8)

#define ISI_CFG1_DISCR				(1 << 11)

#define ISI_CFG1_FULL_MODE			(1 << 12)
@@ -66,6 +67,7 @@ 
#define		ISI_CFG2_YCC_SWAP_MODE_1	(1 << 28)

#define		ISI_CFG2_YCC_SWAP_MODE_2	(2 << 28)

#define		ISI_CFG2_YCC_SWAP_MODE_3	(3 << 28)

#define		ISI_CFG2_YCC_SWAP_MODE_MASK	(3 << 28)

#define ISI_CFG2_IM_VSIZE_OFFSET		0

#define ISI_CFG2_IM_HSIZE_OFFSET		16

#define ISI_CFG2_IM_VSIZE_MASK		(0x7FF << ISI_CFG2_IM_VSIZE_OFFSET)