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Commit b9970b80 authored by Charan Teja Reddy's avatar Charan Teja Reddy
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iommu: read tcu clock testbus properly 



Porgramming guide for tcu clock testbus controller says:

1) Write to the ARM_SMMU_TESTBUS_SEL_HLOS1_NS.
2) Read from the ARM_SMMU_TCU_TESTBUS_HLOS1_NS

to know the internal smmu clock status. Program them accordingly.

Change-Id: I6140d877c2d8366030699fb04099078ebb3b6e2c
Fixes: 47b2cb7a ("iommu: arm-smmu: update access to SMMU TCU testbus registers with scm call")
Signed-off-by: default avatarCharan Teja Reddy <charante@codeaurora.org>
parent 9c25b460

drivers/iommu/arm-smmu-debug.c

+3 −2
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0-only

/*

 * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.

 * Copyright (c) 2019-2021, The Linux Foundation. All rights reserved.

 */



#include <linux/kernel.h>
@@ -38,12 +38,13 @@ u32 arm_smmu_debug_tcu_testbus_select(phys_addr_t phys_addr, 
	int ret = 0;



	if (testbus == CLK_TESTBUS) {

		offset = ARM_SMMU_TESTBUS_SEL_HLOS1_NS;

		if (write) {

			offset = ARM_SMMU_TESTBUS_SEL_HLOS1_NS;

			writel_relaxed(val, tcu_base + offset);

			/* Make sure tcu select register is written to */

			wmb();

		} else {

			offset = ARM_SMMU_TCU_TESTBUS_HLOS1_NS;

			return readl_relaxed(tcu_base + offset);

		}

	} else {

drivers/iommu/arm-smmu-debug.h

+3 −2
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0-only */

/*

 * Copyright (c) 2020, The Linux Foundation. All rights reserved.

 * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.

 */



#define ARM_SMMU_TESTBUS_SEL			0x25E4

#define ARM_SMMU_TESTBUS			0x25E8

#define ARM_SMMU_TESTBUS_SEL_HLOS1_NS		0x8

#define ARM_SMMU_TCU_TESTBUS_HLOS1_NS		0x28

#define DEBUG_TESTBUS_SEL_TBU			0x50

#define DEBUG_TESTBUS_TBU			0x58
@@ -21,7 +22,7 @@ 
#define TCU_PTW_QUEUE_MASK			GENMASK(7, 0)

#define TCU_CACHE_TESTBUS_SEL			0x1

#define TCU_CACHE_LOOKUP_QUEUE_SIZE		32

#define TCU_CLK_TESTBUS_SEL			0x200

#define TCU_CLK_TESTBUS_SEL			0x300





#define TBU_CLK_GATE_CONTROLLER_TESTBUS_SEL	0x1