Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Skip to content
Commit b6adeb6b authored by Sylwester Nawrocki's avatar Sylwester Nawrocki Committed by Stephen Boyd
Browse files

clk: samsung: exynos5800: Move MAU subsystem clocks to MAU sub-CMU



This patch fixes broken sound on Exynos5422/5800 platforms after
system/suspend resume cycle in cases where the audio root clock
is derived from MAU_EPLL_CLK.

In order to preserve state of the USER_MUX_MAU_EPLL_CLK clock mux
during system suspend/resume cycle for Exynos5800 we group the MAU
block input clocks in "MAU" sub-CMU and add the clock mux control
bit to .suspend_regs.  This ensures that user configuration of the mux
is not lost after the PMU block changes the mux setting to OSC_DIV
when switching off the MAU power domain.

Adding the SRC_TOP9 register to exynos5800_clk_regs[] array is not
sufficient as at the time of the syscore_ops suspend call MAU power
domain is already turned off and we already save and subsequently
restore an incorrect register's value.

Fixes: b06a532b ("clk: samsung: Add Exynos5 sub-CMU clock driver")
Reported-by: default avatarJaafar Ali <jaafarkhalaf@gmail.com>
Suggested-by: default avatarMarek Szyprowski <m.szyprowski@samsung.com>
Tested-by: default avatarJaafar Ali <jaafarkhalaf@gmail.com>
Signed-off-by: default avatarSylwester Nawrocki <s.nawrocki@samsung.com>
Link: https://lkml.kernel.org/r/20190808144929.18685-2-s.nawrocki@samsung.com


Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent bf32e7db
Loading
Loading
Loading
Loading
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Please register or to comment