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Commit b4ec5f39 authored by Rodrigo Vivi's avatar Rodrigo Vivi Committed by Joonas Lahtinen
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drm/i915/icl: Fix signal_levels



Since when it was introduced we forgot to add
this case so ICL was using a wrong signal_levels
as reference.

Fixes: fb5c8e9d ("drm/i915/icl: Implement voltage swing programming sequence for Combo PHY DDI")
Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: default avatarManasi Navare <manasi.d.navare@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181017215652.26841-1-rodrigo.vivi@intel.com


(cherry picked from commit 61cdfb9e)
Signed-off-by: default avatarJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
parent 83db3738
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+1 −1
Original line number Diff line number Diff line
@@ -3734,7 +3734,7 @@ intel_dp_set_signal_levels(struct intel_dp *intel_dp)
	uint32_t signal_levels, mask = 0;
	uint8_t train_set = intel_dp->train_set[0];

	if (IS_GEN9_LP(dev_priv) || IS_CANNONLAKE(dev_priv)) {
	if (IS_GEN9_LP(dev_priv) || INTEL_GEN(dev_priv) >= 10) {
		signal_levels = bxt_signal_levels(intel_dp);
	} else if (HAS_DDI(dev_priv)) {
		signal_levels = ddi_signal_levels(intel_dp);